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PDF A48P4616 Data sheet ( Hoja de datos )
| Número de pieza | A48P4616 | |
| Descripción | 16M X 16 Bit DDR DRAM | |
| Fabricantes | AMIC Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de A48P4616 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Preliminary
Document Title
16M X 16 Bit DDR DRAM
Revision History
Rev. No. History
0.0 Initial issue
www.DataSheet4U.com
A48P4616
16M X 16 Bit DDR DRAM
Issue Date
September 5, 2005
Remark
Preliminary
Preliminary (September, 2005, Version 0.0)
AMIC Technology, Corp.
1 page  
Block Diagram (32Mb x 8)
www.DataSheet4U.com
A48P4616
Note:
1. This Functional Block Diagram is intended to facilitate user understanding of the operation of the device; it does
not represent an actual circuit implementation.
2. DM is a unidirectional signal (input only), but is internally loaded to match the load of the bidirectional DQ and
DQS signals.
Preliminary (September, 2005, Version 0.0)
4
AMIC Technology, Corp.
5 Page 
www.DataSheet4U.com
A48P4616
Operating Mode
The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A12 to zero, and bits A0-A6 set
to the desired values. A DLL reset is initiated by issuing a Mode Register Set command with bits A7 and A9-A12 each set to
zero, bit A8 set to one, and bits A0-A6 set to the desired values. A Mode Register Set command issued to reset the DLL should
always be followed by a Mode Register Set command to select normal operating mode.
All other combinations of values for A7-A12 are reserved for future use and/or test modes. Test modes and reserved states
should not be used as unknown operation or incompatibility with future versions may result.
CAS Latencies
Preliminary (September, 2005, Version 0.0)
10
AMIC Technology, Corp.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet A48P4616.PDF ] | |
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