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PDF A43L0616B Data sheet ( Hoja de datos )
| Número de pieza | A43L0616B | |
| Descripción | 512K X 16 Bit X 2 Banks Synchronous DRAM | |
| Fabricantes | AMIC Technology | |
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A43L0616B
Preliminary
512K X 16 Bit X 2 Banks Synchronous DRAM
Document Title
512K X 16 Bit X 2 Banks Synchronous DRAM
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
May 10, 2005
Remark
Preliminary
PRELIMINARY (May, 2005, Version 0.0)
AMIC Technology, Corp.
1 page  
www.DataSheet4U.com
A43L0616B
Absolute Maximum Ratings*
Voltage on any pin relative to VSS (Vin, Vout ) . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +4.6V
Voltage on VDD supply relative to VSS (VDD, VDDQ )
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +4.6V
Storage Temperature (TSTG) . . . . . . . . . . -55°C to +150°C
Soldering Temperature X Time (TSLODER) . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C X 10sec
Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . . 1W
Short Circuit Current (Ios) . . . . . . . . . . . . . . . . . . . . 50mA
*Comments
Permanent device damage may occur if “Absolute Maximum
Ratings” are exceeded.
Functional operation should be restricted to recommended
operating condition.
Exposure to higher than recommended voltage for extended
periods of time could affect device reliability.
Capacitance (TA=25°C, f=1MHz)
Parameter
Input Capacitance
Data Input/Output Capacitance
Symbol
CI1
CI2
CI/O
Condition
A0 to A10, BA
CLK, CKE, CS , RAS , CAS , WE ,
UDQM, LDQM
DQ0 to DQ15
Min
2
2
2
Typ
Max
4
4
6
Unit
pF
pF
pF
DC Electrical Characteristics
Recommend operating conditions (Voltage referenced to VSS = 0V, TA = 0ºC to +70ºC or -40ºC to +85ºC)
Parameter
Symbol
Min
Typ
Max Unit
Supply Voltage
VDD,VDDQ
3.0
3.3
3.6
V
Input High Voltage
VIH
2.0
3.0 VDD+0.3
V
Input Low Voltage
VIL -0.3 0 0.8 V
Output High Voltage
VOH 2.4
-
-
V
Output Low Voltage
VOL -
- 0.4 V
Input Leakage Current
IIL -5 - 5 µA
Output Leakage Current IOL -5 - 5 µA
Output Loading Condition
See Figure 1
Note: 1. VIL (min) = -1.5V AC (pulse width ≤ 5ns).
2. Any input 0V ≤ VIN ≤ VDD + 0.3V, all other pins are not under test = 0V
3. Dout is disabled, 0V ≤ Vout ≤ VDD
Note
Note 1
IOH = -2mA
IOL = 2mA
Note 2
Note 3
PRELIMINARY (May, 2005, Version 0.0)
4
AMIC Technology, Corp.
5 Page 
www.DataSheet4U.com
A43L0616B
Mode Register Filed Table to Program Modes
Register Programmed with MRS
Address BA A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1
A0
Function RFU RFU
(Note 1) (Note 2)
W.B.L
TM
CAS Latency
BT
Burst Length
Test Mode
CAS Latency
Burst Type
Burst Length
A8 A7
Type
A6 A5 A4 Latency A3 Type A2 A1 A0 BT=0
BT=1
0 0 Mode Register Set 0 0 0 Reserved 0 Sequential 0 0 0
1
Reserved
01
Vendor
001
-
1 Interleave 0 0 1
2
Reserved
10
11
Use
Only
010
011
2
3
010
011
4
8
4
8
Write Burst Length
1 0 0 Reserved
1 0 0 Reserved Reserved
A9 Length
1 0 1 Reserved
1 0 1 Reserved Reserved
0 Burst 1 1 0 Reserved
1 1 0 Reserved Reserved
1 Single Bit 1 1 1 Reserved
1 1 1 256(Full) Reserved
(Note 3)
Power Up Sequence
1. Apply power and start clock, Attempt to maintain CKE = “H”, DQM = “H” and the other pins are NOP condition at inputs.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200µs.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 may be changed.
The device is now ready for normal operation.
Note : 1. RFU(Reserved for Future Use) should stay “0” during MRS cycle.
2. If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.
3. The full column burst (256bit) is available only at Sequential mode of burst type.
PRELIMINARY (May, 2005, Version 0.0)
10
AMIC Technology, Corp.
11 Page | ||
| Páginas | Total 45 Páginas | |
| PDF Descargar | [ Datasheet A43L0616B.PDF ] | |
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