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PDF AD7684 Data sheet ( Hoja de datos )
| Número de pieza | AD7684 | |
| Descripción | 16-Bit - 100 kSPS PulSAR Differential ADC in MSOP | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
16-bit resolution with no missing codes
Throughput: 100 kSPS
INL: ±1 LSB typ, ±3 LSB max
True differential analog input range: ±VREF
0 V to VREF with VREF up to VDD on both inputs
Single-supply operation: 2.7 V to 5.5 V
Serial interface SPI-®/QSPI-™/MICROWIRE-™/DSP-compatible
Power Dissipation : 4 mW @ 5 V, 1.5 mW @ 2.7 V,
150 µW @ 2.7 V/10 kSPS
Standby current: 1 nA
8-lead MSOP package
APPLICATIONS
Battery-powered equipment
Data acquisition
Instrumentation
Medical instruments
Process control
GENERAL DESCRIPTION
The AD7684 is a 16-bit, charge redistribution, successive
approximation, PulSAR™ analog-to-digital converter (ADC)
that operates from a single power supply, VDD, between 2.7 V
to 5.5 V. It contains a low power, high speed, 16-bit sampling
ADC with no missing codes, an internal conversion clock, and a
serial, SPI-compatible interface port. The part also contains a
low noise, wide bandwidth, short aperture delay, track-and-hold
16-Bit, 100 kSPS PulSAR
www.DataSheet4U.com
Differential ADC in MSOP
AD7684
APPLICATION DIAGRAM
VREF
0
VREF
0
0.5V TO VDD 2.7V TO 5.5V
REF
VDD
+IN DCLOCK
–IN AD7684 DOUT
GND
CS
Figure 1.
3-WIRE SPI
INTERFACE
Table 1. MSOP, QFN (LFCSP)/SOT-23, 16-Bit PulSAR ADCs
Type
100 kSPS 250 kSPS 500 kSPS
True Differential
AD7684 AD7687 AD7688
Pseudo
AD7683
Differential/Unipolar
AD7685
AD7694
AD7686
Unipolar
AD7680
circuit. On the CS falling edge, it samples the voltage difference
between +IN and –IN pins. The reference voltage, REF, is
applied externally and can be set up to the supply voltage. Its
power scales linearly with throughput.
The AD7684 is housed in an 8-lead MSOP package, with an
operating temperature specified from −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
1 page  
TIMING SPECIFICATIONS
VDD = 2.7 V to 5.5 V; TA = −40°C to +85°C, unless otherwise noted.
Table 5.
Parameter
Throughput Rate
CS Falling to DCLOCK Low
CS Falling to DCLOCK Rising
DCLOCK Falling to Data Remains Valid
CS Rising Edge to DOUT High Impedance
DCLOCK Falling to Data Valid
Acquisition Time
DOUT Fall Time
DOUT Rise Time
AD7684www.DataSheet4U.com
Symbol
tCYC
tCSD
tSUCS
tHDO
tDIS
tEN
tACQ
tF
tR
Min
20
5
400
Typ Max
100
0
16
14 100
16 50
11 25
11 25
Unit
kHz
µs
ns
ns
ns
ns
ns
ns
ns
CS
tSUCS
tCYC
COMPLETE CYCLE
POWER DOWN
DCLOCK
1
45
tCSD
tEN tHDO
DOUT
Hi-Z
0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0
(MSB)
(LSB)
NOTE:
A MINIMUM OF 22 CLOCK CYCLES ARE REQUIRED FOR 16-BIT CONVERSION. SHOWN ARE 24 CLOCK CYCLES.
DOUT GOES LOW ON THE DCLOCK FALLING EDGE FOLLOWING THE LSB READING.
Figure 2. Serial Interface Timing
tACQ
tDIS
Hi-Z
Rev. 0 | Page 5 of 16
5 Page 
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–55 –35 –15
ZERO ERROR
GAIN ERROR
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 19. Offset and Gain Error vs. Temperature
AD7684www.DataSheet4U.com
Rev. 0 | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD7684.PDF ] | |
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