PDF ADC122S625 Data sheet ( Hoja de datos )

Número de pieza	ADC122S625
Descripción	Dual 12-Bit - 50 kSPS to 200 kSPS - Simultaneous Sampling A/D Converter
Fabricantes	National Semiconductor
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No Preview Available ! February 25, 2008 www.DataSheet4U.com ADC122S625 Dual 12-Bit, 50 kSPS to 200 kSPS, Simultaneous Sampling A/D Converter General Description The ADC122S625 is a dual 12-bit, 50 kSPS to 200 kSPS si- multaneous sampling Analog-to-Digital (A/D) converter. The analog inputs on both channels are sampled simultaneously to preserve their relative phase information to each other. The converter is based on a successive-approximation register architecture where the differential nature of the analog inputs is maintained from the internal track-and-hold circuits throughout the A/D converter to provide excellent common- mode signal rejection. The ADC122S625 features an external reference that can be varied from 1.0V to VA. The ADC122S625's serial data output is binary 2's comple- ment and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP se- rial interfaces. The serial clock (SCLK) and chip select bar (CS) are shared by both channels. Operating from a single 5V analog supply and a reference voltage of 2.5V, the total power consumption while operating at 200 kSPS is typically 8.6 mW. With the ADC122S625 op- erating in power-down mode, the power consumption re- duces to 2.6 µW. The differential input, low power consump- tion, and small size make the ADC122S625 ideal for direct connection to sensors in motor control applications. Operation is guaranteed over the industrial temperature range of −40°C to +105°C and clock rates of 1.6 MHz to 6.4 MHz. The ADC122S625 is available in a 10-lead MSOP pack- age. Features ■ True Simultaneous Sampling Differential Inputs ■ Guaranteed performance from 50 kSPS to 200 kSPS ■ External Reference ■ Wide Input Common-Mode Voltage Range ■ Single High-Speed Serial Data Output ■ Operating Temperature Range of −40°C to +105°C ■ SPI™/QSPI™/MICROWIRE™/DSP compatible Serial Interface Key Specifications ■ Conversion Rate 50 kSPS to 200 kSPS ■ INL ±1 LSB (max) ■ DNL ±0.95 LSB (max) ■ SNR 71 dBc (min) ■ THD -72 dBc (min) ■ ENOB 11.25 bits (min) ■ Power Consumption at 200 kSPS — Converting, VA = 5V, VREF = 2.5V 8.6 mW (typ) — Power-Down, VA = 5V, VREF = 2.5V 2.6 µW (typ) Applications ■ Motor Control ■ Power Meters/Monitors ■ Multi-Axis Positioning Systems ■ Instrumentation and Control Systems ■ Data Acquisition Systems ■ Medical Instruments ■ Direct Sensor Interface Connection Diagram TRI-STATE® is a trademark of National Semiconductor Corporation. MICROWIRE™ is a trademark of National Semiconductor Corporation. QSPI™ and SPI™ are trademarks of Motorola, Inc. © 2008 National Semiconductor Corporation 300553 30055305 www.national.com 1 page Symbol Parameter VREF Reference Voltage Range DIGITAL INPUT CHARACTERISTICS Conditions Typical Limits Units 1w.0ww.DataSVhe(metin4U) .com VA V (max) VIH Input High Voltage VIL Input Low Voltage IIN Input Current CIND Input Capacitance DIGITAL OUTPUT CHARACTERISTICS VIN = 0V or VA 2.4 V (min) 0.8 V (max) ±1 µA (max) 2 4 pF (max) VOH Output High Voltage VOL Output Low Voltage IOZH, IOZL COUT TRI-STATE Leakage Current TRI-STATE Output Capacitance Output Coding ISOURCE = 200 µA ISOURCE = 1 mA ISINK = 200 µA ISINK = 1 mA Force 0V or VA Force 0V or VA VA − 0.02 VA − 0.09 0.01 VA − 0.2 0.4 V (min) V V (max) 0.08 V ±1 µA (max) 2 4 pF (max) Binary 2'S Complement POWER SUPPLY CHARACTERISTICS VA Analog Supply Voltage 4.5 V (min) 5.5 V (max) IVA (Conv) Analog Supply Current, Continuously Converting IVREF (Conv) Reference Current, Continuously Converting fSCLK = 6.4 MHz, fS = 200 kSPS, fIN = 20 kHz, VA = 5V fSCLK = 6.4 MHz, fS = 200 kSPS, VREF = 2.5V 1.7 20 2.45 mA (max) 40 µA (max) IVA (PD) Analog Supply Current, Power Down Mode (CS high) fSCLK = 6.4 MHz, VA = 5.0V fSCLK = 0, VA = 5.0V (Note 8) IVREF (PD) Reference Current, Power Down Mode (CS high) fSCLK = 6.4 MHz, VREF = 2.5V fSCLK = 0, VREF = 2.5V (Note 8) PWR (Conv) Power Consumption, Continuously Converting fSCLK = 6.4 MHz, fS = 200 kSPS, fIN = 20 kHz, VA = 5.0V, VREF = 2.5V PWR Power Consumption, Power Down Mode fSCLK = 6.4 MHz, VA = 5.0V, VREF = 2.5V (PD) (CS high) fSCLK = 0, VA = 5.0V, VREF = 2.5V PSRR Power Supply Rejection Ratio See the Specification Definitions for the test condition 10 0.5 0.05 0.05 8.6 50 2.6 −85 1.1 0.1 12.4 5.8 µA µA (max) µA µA (max) mW (max) µW µW (max) dB AC ELECTRICAL CHARACTERISTICS fSCLK fSCLK fS Maximum Clock Frequency Minimum Clock Frequency Maximum Sample Rate Minimum Sample Rate 20 6.4 MHz (min) 0.8 1.6 MHz (max) 625 200 kSPS (min) 25 50 kSPS (min) tACQ tCONV tAD Track/Hold Acquisition Time Conversion Time Aperture Delay 3 SCLK cycles 12 SCLK cycles 6 ns 5 www.national.com 5 Page Typical Performance Characteristics 6.4 MHz, fIN = 20 kHz unless otherwise stated. VA = 5.0V, VREF = 2.5V, TA = +25°C, fSAMPLEw=w2w00.DkaStPaSSh, efSeCtL4KU=.com SINAD vs. VREF THD vs. VREF 30055337 SINAD vs. SCLK FREQUENCY 30055336 THD vs. SCLK FREQUENCY 30055341 SINAD vs. INPUT FREQUENCY 30055340 THD vs. INPUT FREQUENCY 30055349 11 30055348 www.national.com 11 Page

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