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PDF ADC12DL066 Data sheet ( Hoja de datos )
| Número de pieza | ADC12DL066 | |
| Descripción | Dual 12-Bit - 66Msps - 450MHz Input Bandwidth A/D Converter w/Internal Reference | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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February 1, 2008
www.DataSheet4U.com
ADC12DL066
Dual 12-Bit, 66 Msps, 450 MHz Input Bandwidth A/D
Converter w/Internal Reference
General Description
The ADC12DL066 is a dual, low power monolithic CMOS
analog-to-digital converter capable of converting analog input
signals into 12-bit digital words at 66 Megasamples per sec-
ond (Msps), minimum. This converter uses a differential,
pipeline architecture with digital error correction and an on-
chip sample-and-hold circuit to minimize die size and power
consumption while providing excellent dynamic performance
and a 450 MHz Full Power Bandwidth. Operating on a single
3.3V power supply, the ADC12DL066 achieves 10.7 effective
bits and consumes just 686 mW at 66 Msps, including the
reference current. The Power Down feature reduces power
consumption to 75 mW.
The differential inputs provide a full scale differential input
swing equal to 2 times VREF with the possibility of a single-
ended input. Full use of the differential input is recommended
for optimum performance. The digital outputs from the two
ADCs are available on separate 12-bit buses with an output
data format choice of offset binary or two’s complement.
To ease interfacing to lower voltage systems, the digital out-
put driver power pins of the ADC12DL066 can be connected
to a separate supply voltage in the range of 2.4V to the digital
supply voltage.
This device is available in the 64-lead TQFP package and will
operate over the industrial temperature range of −40°C to
+85°C. An evaluation board is available to ease the evalua-
tion process.
Features
■ Choice of Binary or 2’s complement output format
■ Single +3.3V Supply Operation
■ Outputs 2.4V to 3.3V Compatible
■ Pin Compatible with ADC12D040
■ Power Down Mode
■ Internal/External Reference
Key Specifications
■ Resolution
■ DNL
■ SNR (fIN = 10 MHz)
■ SFDR (fIN = 10 MHz)
■ Data Latency
■ Power Consumption
■ — Operating
— Power Down Mode
12 Bits
±0.5 LSB (typ)
66 dB (typ)
81 dB (typ)
6 Clock Cycles
686 mW (typ)
75 mW (typ)
Applications
■ Ultrasound and Imaging
■ Instrumentation
■ Communications Receivers
■ Sonar/Radar
■ xDSL
■ Cable Modems
■ DSP Front Ends
Connection Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2008 National Semiconductor Corporation 200552
20055201
www.national.com
1 page  
Absolute Maximum Ratings
(Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VA, VD, VDR
|VA–VD|
4.2V
≤ 100 mV
Voltage on Any Input or Output Pin
−0.3V to (VA or VD
+0.3V)
Input Current at Any Pin (Note 3)
±25 mA
Package Input Current (Note 3)
±50 mA
Package Dissipation at TA = 25°C
ESD Susceptibility
See (Note 4)
Human Body Model (Note 5)
2500V
Machine Model (Note 5)
250V
Soldering Temperature, Infrared, 10 sec. (Note 6) 235°C
Storage Temperature
−65°C to +150°C
Operating Ratings
Operating Temperature
Supply Voltage (VA, VD)
Output Driver Supply (VDR)
VREF Input
CLK, PD, OE
Analog Input Pins
Common Mode Input Voltage
(VCM)
|AGND–DGND|
(Notesw1,w2w) .DataSheet4U.com
−40°C ≤ TA ≤ +85°C
+3.0V to +3.6V
+2.4V to VD
0.8V to 1.5V
−0.05V to (VD + 0.05V)
0V to (VA − 0.5V)
0.5V to 1.5V
≤100mV
Package Thermal Resistance
Package
64-Lead TQFP
θJ-A
50°C / W
Converter Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V,
VDR = +2.5V, PD = 0V, INT/EXT REF pin = +3.3V, VREF = +1.0V, fCLK = 66 MHz, fIN = 10 MHz, tr = tf = 2 ns, CL = 15 pF/pin. Boldface
limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
12 Bits (min)
INL Integral Non Linearity (Note 11)
±1.2
±3.0
LSB (max)
DNL
Differential Non Linearity
±0.5
±1.0
LSB (max)
PGE Positive Gain Error
±0.2 ±3.6 %FS (max)
NGE Negative gain Error
±0.2 ±3.6 %FS (max)
TC GE Gain Error Tempco
VOFF
Offset Error (VIN+ = VIN−)
−40°C ≤ TA ≤ +85°C
−60
0.18
+1.3
-0.9
ppm/°C
%FS (max)
%FS (min)
TC VOFF Offset Error Tempco
Under Range Output Code
−40°C ≤ TA ≤ +85°C
−2.4
00
ppm/°C
Over Range Output Code
4095
4095
REFERENCE AND ANALOG INPUT CHARACTERISTICS
VCM Common Mode Input Voltage
0.5 V (min)
1.0
1.5 V (max)
(CLK LOW)
CIN VIN Input Capacitance (each pin to GND) VIN = 2.5 Vdc + 0.7 Vrms (CLK HIGH)
8
7
pF
pF
VREF
External Reference Voltage (Note 13)
0.8 V (min)
1.00
1.5 V (max)
RREF
Reference Input Resistance
100 MΩ (min)
5 www.national.com
5 Page 
Typical Performance Characteristics
otherwise stated
VA = VD = +3.3V, VDR = +2.5V, fCLK = 66 MHzw, fwINw=.1D0aMtaHShzeuentle4sUs.com
DNL
INL
20055218
DNL vs. VDR
INL vs. VDR
20055260
DNL vs. fCLK
20055221
INL vs. fCLK
20055226
20055219
11
20055224
www.national.com
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADC12DL066.PDF ] | |
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