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PDF ADF7901 Data sheet ( Hoja de datos )

Número de pieza ADF7901
Descripción High Performance ISM Band OOK/FSK Transmitter IC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
Single-chip, low power UHF transmitter
369.5 MHz to 395.9 MHz frequency operation using
fractional-N PLL and fully integrated VCO
3.0 V supply voltage
Data rates up to 50 kbps supported
Low current consumption
26 mA at 12 dBm output at 384 MHz
Power-down mode (<1 μA)
24-lead TSSOP
High Performance ISM Band
OOK/FSK Transmitter IC
ADF7901
GENERAL DESCRIPTION
The ADF7901 is a low power OOK/FSK UHF transmitter
designed for use in RF remote control devices. It is capable of
frequency shift keying (FSK) modulation on eight different
channels, selectable by three external control lines. OOK
modulation is performed by modulating the PA control line.
The on-chip VCO operates at 2× the output frequency. The
division by 2 at the output of the VCO reduces the amount of
PA feedthrough. As a result, OOK modulation depths of greater
than 50 dB are easily achievable.
The FSK_ADJ and ASK_ADJ resistors can be adjusted in the
system to optimize output power for each modulation scheme.
An additional 1.5 dB of output power is provided for the lower
bank of channels to adjust for antenna performance. The CE
line allows the transmitter to be powered down completely.
In this mode, the leakage current is typically 0.1 μA.
FUNCTIONAL BLOCK DIAGRAM
OSC1
OSC2
DVDD
TXDATA
FSK
R=1
PDF
CHARGE
PUMP
FRACTIONAL N
Σ-Δ
CHANNEL SELECT
VCO
PA_EN
CREG2
CVCO
VDD
RFOUT
PA
RFGND
LDO
REGULATOR
1
LDO
REGULATOR
2
CREG1
CREG2
RSET
CE
DGND
FSK1 FSK2 FSK3
OOK_SEL
RSET_FSK
Figure 1.
RSET_OOK
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.

1 page




ADF7901 pdf
ADF7901
Parameter
PHASE-LOCKED LOOP
VCO Gain
Spurious3, 7
Integer Boundary
Reference
Harmonics3
Second Harmonic VDD = 3.0 V
Third Harmonic VDD = 3.0 V
All Other Harmonics
REFERENCE INPUT
Crystal Reference
Crystal ESR8
POWER AMPLIFIER
PA Output Impedance
TIMING INFORMATION
Crystal Oscillator to PLL Lock3
PA Enable to PA Ready–PLL Settle9
TEMPERATURE RANGE (TA)
Min Typ
30
–45
−70
−24
−14
9.8304
97 Ω + 6.4 pF
2
100
0
Max
−23
−23
−21
−11
−18
80
3
250
50
Unit Comments/Conditions
MHz/V
dBc
dBc
At 384 MHz
100 kHz loop BW
dBc
dBc
dBc
MHz
Ω
At 384 MHz
ms
μs
°C
1 Operating temperature range is 0°C to 50°C.
2 Frequency Deviation = 58 × (9.8304 MHz)/214. Error in the crystal is reflected in variation in the desired deviation.
3 Not production tested; based on characterization.
4 The output power can be varied in both ASK/FSK mode by altering the relevant external resistor.
5 Measured using spectrum analyzer, 1 MHz span, 100 kHz RBW, maximum hold enabled.
6 Maximum power-down current specification applies for the OSC2 pin grounded.
7 Measured >461.9 kHz away from channel.
8 Maximum recommended crystal ESR. The crystal oscillator works with crystals with higher ESR, but this results in longer power-up times.
9 This specification refers to the time taken for the PLL to regain lock after the PA has been enabled. The PA is should only be enabled after the PLL has settled to the
correct frequency.
Rev. A | Page 4 of 12

5 Page





ADF7901 arduino
ADF7901
VCOIN
3.6kΩ
22nF
2.2μF
2.2μF
CVCO CREG2
RSET
CREG1
DVDD
CPOUT
RFOUT
VCOIN
MATCHING RFOUT TO 50Ω
27nH
5.6pF
5TH-ORDER, LOW-PASS FILTER
22nH 22nH
1.5pF
3pF 8pF 3pF
36nH
ANTENNA
ADF7901
TxDATA
FSK1
FSK2
FSK3
OOK_SEL
PA_EN
CE
RSET_FSK
RSET_OOK
3.6kΩ
3.6kΩ
OSC2
OSC1
9.8304MHz
GND
33pF 33pF
MATCHING 50Ω
TO ANTENNA
NOTES
1. DECOUPLING CAPACITORS HAVE
BEEN OMITTED FOR CLARITY.
Figure 8. Applications Diagram for the ADF7901 in a Remote Control System
LAYOUT GUIDELINES
The layout of the board is crucial to ensuring low levels of
spurious and harmonics.
Decoupling
Decoupling capacitors (high frequency 22 pF, low frequency
100 nF) should be placed as close as possible to the supply pins
on the part. Low size 0402 and 0603 components are recom-
mended for the high frequency rejection on the supply.
Regulator Stability
A minimum of 1 μF is needed on both CREG1 and CREG2 to ensure
stability. An additional 22 pF capacitor can be added to reject
higher frequency noise. Because many of the internal blocks
run off the regulator, it is critical to reduce its noise. Low size
0402 and 0603 components are recommended for the high
frequency rejection on the supply.
Grounding
Emphasis should be placed on grounding once the decoupling
capacitors have been added. The PA stage switches currents of
15 mA in maximum power mode. This causes changes in the
ground resulting in large return currents that can radiate to
other parts of the board. The shortest and least obstructed
ground from RFGND back to the ground of the battery should be
ensured. A 4-layer board helps, as well as flooding the top layer.
The ground paths should not have any vias and should be wide
tracks.
Supply
The supply tracks can be routed through vias, because they act
as free inductors and make layout easier on a 2-layer board
(see the Decoupling section). Tracks should be wide.
Digital Lines
Digital lines should contain a large resistor in series. This
impedance blocks signals of many frequencies, including
harmonics and the carrier frequency. Long control lines can
act as antennae. It can be useful to add capacitance to ground.
There is some capacitance to ground provided by the lines and
at the input of the digital pins.
Rev. A | Page 10 of 12

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