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PDF AFBR-732B Data sheet ( Hoja de datos )

Número de pieza AFBR-732B
Descripción Ultra Short Link Pluggable Parallel Fiber Optic Modules : Transmitter and Receiver
Fabricantes Agilent 
Logotipo Agilent Logotipo



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Agilent AFBR-732B/BE and AFBR-
742B/BE Ultra Short Link Pluggable
Parallel Fiber Optic Modules,
Transmitter and Receiver
Data Sheet
Description
The AFBR-732B transmitter
and AFBR-742B receiver are
high performance fiber optic
modules for parallel optical
data communication
applications. These 12-channel
devices, operating up to 2.5Gbd
per channel, provide a cost
effective solution for short-
reach applications requiring up
to 30 Gb/s aggregate bandwidth.
These modules are designed to
operate on multimode fiber
systems at a nominal
wavelength of 850 nm. They
incorporate high performance,
highly reliable, short
wavelength optical devices
coupled with proven circuit
technology to provide long life
and consistent service.
The AFBR-732B transmitter
module incorporates a 12-
channel VCSEL (Vertical Cavity
Surface Emitting Laser) array
together with a custom 12-
channel laser driver integrated
circuit providing IEC-60825
and CDRH Class 1M laser eye
safety.
The AFBR-742B receiver
module contains a 12-channel
PIN photodiode array coupled
with a custom preamplifier /
post amplifier integrated
circuit.
Operating from a single +3.3 V
power supply, both modules
provide LVTTL or LVCMOS
control interfaces and Current
Mode Logic (CML) compatible
data interfaces to simplify
external circuitry.
The transmitter and receiver
devices are housed in MTP®/
MPO receptacled packages.
Electrical connections to the
devices are achieved by means
of a pluggable 10 x 10
connector array.
Features
Low cost per Gb/s
High package density per Gb/s
3.3 volt power supply for low power
consumption
850 nm VCSEL array source
12 independent channels per
module
Separate transmitter and receiver
modules
2.5 Gbd data rate per channel
Standard MTP® (MPO) ribbon fiber
connector interface
Pluggablepackage
50/125 micron multimode fiber
operation:
Distance up to 50 m with 50um,
500 MHz.km fiber at 2.5 Gbd
Data I/O is CML compatible
Control I/O is LVTTL compatible
Manufactured in an ISO 9002
certified facility
Applications
Proprietary Ultra short link
interconnects
Ordering Information
The AFBR-732B and AFBR-
742B products are available for
production orders through the
Agilent Component Field Sales
office.
AFBR-732B No EMI Nose Shield
AFBR-742B No EMI Nose Shield
AFBR-732BE With EMI Nose Shield
AFBR-742BE With EMI Nose Shield
This preliminary data is provided to assist you in the evaluation of product(s) currently under development. Until Agilent
Technologies releases this product for general sales, Agilent reserves the right to alter prices, specifications, features,
capabilities, functions, release dates, and remove availability of the product(s) at anytime.

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AFBR-732B pdf
Absolute Maximum Ratings [1,2]
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Parameter
Symbol
Min.
Max.
Unit Reference
Storage Temperature (non-operating)
TS
–40 100 °C 1
Case Temperature (operating)
TC
90 °C 1, 2, 4
Supply Voltage
VCC –0.5 4.6 V 1, 2
Data/Control Signal Input Voltage
VI
–0.5
VCC + 0.5
V
1
Transmitter Differential Data Input Voltage |VD|
2 V 1, 3
Output Current (dc)
ID
25 mA 1
Relative Humidity (non-condensing)
RH
5
95 % 1
Notes:
1. Absolute Maximum Ratings are those values beyond which damage to the device may occur. See Reliability Data Sheet for specific reliability
performance.
2. Between Absolute Maximum Ratings and the Recommended Operating Conditions functional performance is not intended, device reliability is not
implied, and damage to the device may occur over an extended period of time.
3. This is the maximum voltage that can be applied across the Transmitter Differential Data Inputs without damaging the input circuit.
4. Case Temperature is measured as indicated in Figure 3.
Recommended Operating Conditions [1]
Parameter
Symbol
Case Temperature
Supply Voltage
Signaling Rate per Channel
Data Input Differential Peak-to-Peak
Voltage Swing
Control Input Voltage High
Control Input Voltage Low
Power Supply Noise for
Transmitter and Receiver
Transmitter/Receiver Data
I/O Coupling Capacitors
Receiver Differential Data Output Load
TC
VCC
DVDINP-P
VIH
VIL
NP
CAC
RDL
Min.
0
3.135
1
175
2.0
VEE
Typ.
40
3.3
0.1
100
Max.
80
3.465
2.5
1400
VCC
0.8
200
Unit
°C
V
Gbd
mVP-P
V
V
mVP-P
µF
Reference
2, Figs. 3, 4
Figs. 5, 6, 12
3
4, Figs. 7, 8
5, Figs. 5, 6
Fig. 7
Fig. 7
Notes:
1. Recommended Operating Conditions are those values outside of which functional performance is not intended, device reliability is not implied, and
damage to the device may occur over an extended period of time. See Reliability Data Sheet for specific reliability performance.
2. Case Temperature is measured as indicated in Figure 3. A +55 °C, 1 m/s, parallel to the printed circuit board, air flow at the module or equivalent
cooling is required. See Figure 4.
3. The receiver has a lower cut off frequency near 100 kHz.
4. Data inputs are CML compatible. Coupling capacitors are required to block DC. VDINP-P = VDINH VDINL, where VDINH = High State Differential
Data Input Voltage and VDINL = Low State Differential Data Input Voltage.
5. Power Supply Noise is defined for the supply, VCC, over the frequency range from 500 Hz to 2500 MHz, with the recommended power supply filter in
place, at the supply side of the recommended filter. See Figures 5 and 6 for recommended power supply filters.
5

5 Page





AFBR-732B arduino
Table 1. Transmitter Module Pad Description
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Symbol
Functional Description
VEE Transmitter Signal Common. All voltages are referenced to this potential unless otherwise indicated. Directly
connect these pads to transmitter signal ground plane.
VCCT
DIN0+ through DIN11+
DIN0– through DIN11–
Transmitter Power Supply. Use recommended power supply filter circuit in Figure 6.
Transmitter Data In+ for channels 0 through 11, respectively. Differential termination and self bias are included,
see Figure 11.
Transmitter Data In- for channels 0 through 11, respectively. Differential termination and self bias are included;
see Figure 11.
TX_EN
TX_DIS
RESET-
FAULT-
DNC
TX Enable. Active high. Internal pull-up High = VCSEL array is enabled if TX_DIS is inactive (Low). Low =
VCSEL array is off. TX_EN must be taken to a logic low state level (VOL) for 1 ms or longer.
TX Disable. Active high. Internal pull-down Low = VCSEL array is enabled if TX_EN is active (High). High =
VCSEL array is off. TX_DIS must be taken to a logic High state level (VOH) for 1 ms or longer.
Transmitter RESET- input. Active low. Internal pull-up. Low = Resets logic functions, clears FAULT- signal,
VCSEL array is off. high = Normal operation. See Figure 14.
Transmitter FAULT- output. Active low. Low (logic "0") results from a VCSEL over-current condition, out of
temperature range, or EEPROM calibration data corruption condition detected for any VCSEL. An asserted (logic
"0") FAULT- disables the VCSEL array and is cleared by RESET- or power cycling VCCT FAULT- is a single ended
LVTTL compatible output.
Do not connect to any electrical potential.
Table 2. Receiver Module Pad Description
Symbol
Functional Description
VEE Receiver Signal Common. All voltages are referenced to this potential unless otherwise indicated. Directly
connect these pads to receiver signal ground plane.
VCCR
VPP
DOUT0+ through DOUT11+
Receiver Power Supply. Use recommended power supply filter circuit in Figure 5.
Not required for Agilent product. Pads not internally connected
Receiver Data Out+ for channels 0 through 11, respectively. Terminate these high-speed differential CML outputs
with standard CML techniques at the inputs of the receiving device. Individual data outputs will be squelched for
insufficient input signal level.
DOUT0– through DOUT11–
Receiver Data Out- for channel 0 through 11, respectively. Terminate these high-speed differential CML outputs
with standard CML techniques at the inputs of the receiving device. Individual data outputs will be squelched for
insufficient input signal level.
SD Signal Detect. Normal optical input levels to all channels results in a logic "1" output, VOH, asserted. Low input
optical levels to any channel results in a fault condition indicated by a logic "0" output, VOL, de-asserted. SD is a
single-ended LVTTL compatible output.
RX_EN
Receiver output enable. Active high (logic "1"), internal pull-up. Low (logic "0") = receiver outputs disabled, all
outputs are high (logic "1").
SQ_EN
Squelch enable input. Active high (logic "1"), internal pull-up. Low (logic "0") = squelch disabled. When SQ_EN
is high and SD is low, corresponding outputs are squelched.
EN_SD
Enable Signal Detect. Active high (logic "1"), internal pull-up. Low (logic "0") = Signal detect output forced
active high.
DNC Do not connect to any electrical potential.
11

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