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PDF RD74LVC1G14 Data sheet ( Hoja de datos )

Número de pieza RD74LVC1G14
Descripción Schmitt-trigger Inverter Buffer
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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RD74LVC1G14
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Schmitt–trigger Inverter Buffer
REJ03D0705–0100
Rev.1.00
Jul 26, 2006
Description
The RD74LVC1G14 has an Schmitt–trigger Inverter Buffer in a 5-pin package. Low voltage and high-speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the
battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supply voltage range : 1.65 to 5.5 V
Operating temperature range: –40 to +85°C
All inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs: VO (Max.) = 5.5 V (@VCC = 0 V)
Output current:
±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±24 mA (@VCC = 3.0 V)
±32 mA (@VCC = 4.5 V)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
RD74LVC1G14WPE
WCSP-5 pin
SXBG0005LB–A
(TBS-5CV)
Package
Abbreviation
WP
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Article Indication
Marking
Year code
EAYM
Month code
Rev.1.00 Jul 26, 2006 page 1 of 7

1 page




RD74LVC1G14 pdf
RD74LVC1G14
Switching Characteristics
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
2.8 9.9
3.8 11.0
Unit Test Conditions
ns CL = 15 pF, RL = 1 M
CL = 30 pF, RL = 1.0 k
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VCC = 1.8 ± 0.15 V
FROM
TO
(Input) (Output)
AY
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
1.6 5.5
2.0 6.5
Unit Test Conditions
ns CL = 15 pF, RL = 1 M
CL = 30 pF, RL = 500
VCC = 2.5 ± 0.2 V
FROM
TO
(Input) (Output)
AY
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
1.5 4.6
1.8 5.5
Unit Test Conditions
ns CL = 15 pF, RL = 1 M
CL = 50 pF, RL = 500
VCC = 3.3 ± 0.3 V
FROM
TO
(Input) (Output)
AY
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
0.9 4.4
1.2 5.0
Unit Test Conditions
ns CL = 15 pF, RL = 1 M
CL = 50 pF, RL = 500
VCC = 5.0 ± 0.5 V
FROM
TO
(Input) (Output)
AY
Operating Characteristics
Item
Power dissipation capacitance
Symbol
CPD
VCC (V)
1.8
2.5
3.3
5.0
Ta = 25°C
Min Typ Max
— 16 —
— 18 —
— 18 —
— 20 —
Unit Test Conditions
pF f = 10 MHz
Test Circuit
From Output
Measurement point
CL* RL
Note: CL includes probe and jig capacitance.
Rev.1.00 Jul 26, 2006 page 5 of 7

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