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RD74LVC16240B Schematic ( PDF Datasheet ) - Renesas Technology

Teilenummer RD74LVC16240B
Beschreibung 16-bit Buffers / Line Drivers
Hersteller Renesas Technology
Logo Renesas Technology Logo 




Gesamt 9 Seiten
RD74LVC16240B Datasheet, Funktion
RD74LVC16240B
www.DataSheet4U.com
16-bit Buffers / Line Drivers with 3-state Outputs
Description
REJ03D0526-0100
Rev.1.00
Mar. 14, 2005
The RD74LVC16240B has sixteen inverter drivers with three state outputs in a 48 pin package. This device is a
inverting buffer and has two active low enables (1G to 4G). Each enable independently controls four buffers. Low
voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
VCC = 1.65 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±12 mA (@VCC = 2.7 V)
±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
RD74LVC16240BTEL
TSSOP–48 pin
PTSP0048KA–A
(TTP–48DBV)
Package
Abbreviation
T
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
Function Table
G
H
L
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
Inputs
A
X
H
L
Output Y
Z
L
H
Rev.1.00 Mar. 14, 2005 page 1 of 8






RD74LVC16240B Datasheet, Funktion
RD74LVC16240B
Test Circuit
VCC
Input
Pulse generator
Zout = 50
VCC
1G to 4G
Output
1Y1 to 4Y4
1A1 to 4A4
CL
www.DataSheet4U.com
RL S1
RL
OPEN
VTT
GND
Note: 1. CL includes probe and jig capacitance.
Symbol
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S1
OPEN
GND
VTT
Waveforms – 1
Input A
Output Y
tf
90 %
Vref
10 %
tPLH
Vref
tr
10 %
90 %
Vref
tPHL
Vref
Notes: 1. Input waveform : PRR = 10 MHz, ZO = 50 , duty cycle 50%
VIH
GND
VOH
VOL
Rev.1.00 Mar. 14, 2005 page 6 of 8

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