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PDF R4S2424 Data sheet ( Hoja de datos )
| Número de pieza | R4S2424 | |
| Descripción | 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series | |
| Fabricantes | Renesas Technology | |
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REJ09B0466-0100
www.DataSheet4U.com
16
H8S/2426, H8S/2426R, H8S/2424 Group
Hardware Manual
Renesas 16-Bit Single-Chip Microcomputer
H8S Family / H8S/2400 Series
H8S/2426
H8S/2426R
H8S/2424
R4F2426
R4S2426
R4F2426R
R4S2426R
R4F2424
R4S2424
All information contained in this material, including products and product
specifications at the time of publication of this material, is subject to change by
Renesas Technology Corp. without notice. Please review the latest information
published by Renesas Technology Corp. through various means, including the
Renesas Technology Corp. website (http://www.renesas.com).
Rev.1.00
Revision Date: Sep. 19, 2008
1 page  
How to Use This Manual
www.DataSheet4U.com
1. Objective and Target Users
This manual was written to explain the hardware functions and electrical characteristics of this
LSI to the target users, i.e. those who will be using this LSI in the design of application
systems. Target users are expected to understand the fundamentals of electrical circuits, logic
circuits, and microcomputers.
This manual is organized in the following items: an overview of the product, descriptions of
the CPU, system control functions, and peripheral functions, electrical characteristics of the
device, and usage notes.
When designing an application system that includes this LSI, take all points to note into
account. Points to note are given in their contexts and at the final part of each section, and
in the section giving usage notes.
The list of revisions is a summary of major points of revision or addition for earlier versions.
It does not cover all revised items. For details on the revised points, see the actual locations
in the manual.
The following documents have been prepared for the H8S/2426, H8S/2426R, H8S/2424
Group. Before using any of the documents, please visit our web site to verify that you have the
most up-to-date available version of the document.
Document Type
Data Sheet
Hardware Manual
Software Manual
Application Note
Renesas Technical
Update
Contents
Document Title
Document No.
Overview of hardware and electrical
characteristics
Hardware specifications (pin
assignments, memory maps,
peripheral specifications, electrical
characteristics, and timing charts)
and descriptions of operation
H8S/2426, H8S/2426R,
H8S/2424 Group
Hardware Manual
This manual
Detailed descriptions of the CPU
and instruction set
H8S/2600 Series
REJ09B0139
H8S/2000 Series Software
Manual
Examples of applications and
sample programs
The latest versions are available from our
web site.
Preliminary report on the
specifications of a product,
document, etc.
Rev. 1.00 Sep. 19, 2008 Page v of xxviii
5 Page 
Section 5 Interrupt Controller .........................................w..w..w....D..a..t.a..S.h..e..e.t.4..U...c..o..m......103
5.1 Features.............................................................................................................................. 103
5.2 Input/Output Pins............................................................................................................... 105
5.3 Register Descriptions ......................................................................................................... 106
5.3.1 Interrupt Control Register (INTCR) ..................................................................... 107
5.3.2 Interrupt Priority Registers A to N (IPRA to IPRN)............................................. 108
5.3.3 IRQ Enable Register (IER) ................................................................................... 110
5.3.4 IRQ Sense Control Registers H and L (ISCRH, ISCRL)...................................... 112
5.3.5 IRQ Status Register (ISR)..................................................................................... 118
5.3.6 IRQ Pin Select Register (ITSR)............................................................................ 119
5.3.7 Software Standby Release IRQ Enable Register (SSIER) .................................... 122
5.4 Interrupt Sources................................................................................................................ 123
5.4.1 External Interrupts ................................................................................................ 123
5.4.2 Internal Interrupts ................................................................................................. 124
5.5 Interrupt Exception Handling Vector Table....................................................................... 125
5.6 Interrupt Control Modes and Interrupt Operation .............................................................. 132
5.6.1 Interrupt Control Mode 0...................................................................................... 133
5.6.2 Interrupt Control Mode 2...................................................................................... 135
5.6.3 Interrupt Exception Handling Sequence ............................................................... 137
5.6.4 Interrupt Response Times ..................................................................................... 139
5.6.5 DTC and DMAC Activation by Interrupt ............................................................. 140
5.7 Usage Notes ....................................................................................................................... 141
5.7.1 Conflict between Interrupt Generation and Disabling .......................................... 141
5.7.2 Instructions that Disable Interrupts....................................................................... 142
5.7.3 Times when Interrupts are Disabled ..................................................................... 142
5.7.4 Interrupts during Execution of EEPMOV Instruction .......................................... 142
5.7.5 Change of IRQ Pin Select Register (ITSR) Setting .............................................. 142
5.7.6 IRQ Status Register (ISR)..................................................................................... 143
Section 6 Bus Controller (BSC).........................................................................145
6.1 Features.............................................................................................................................. 145
6.2 Input/Output Pins............................................................................................................... 148
6.3 Register Descriptions ......................................................................................................... 151
6.3.1 Bus Width Control Register (ABWCR)................................................................ 152
6.3.2 Access State Control Register (ASTCR) .............................................................. 152
6.3.3 Wait Control Registers AH, AL, BH, and BL
(WTCRAH, WTCRAL, WTCRBH, and WTCRBL) ........................................... 153
6.3.4 Read Strobe Timing Control Register (RDNCR) ................................................. 159
6.3.5 CS Assertion Period Control Registers H, L (CSACRH, CSACRL).................... 161
Rev. 1.00 Sep. 19, 2008 Page xi of xxviii
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet R4S2424.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| R4S2424 | 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series | Renesas Technology |
| R4S2424 | 16-Bit Single-Chip Microcomputer |  Renesas |
| R4S2426 | 16-Bit Single-Chip Microcomputer | Renesas |
| R4S2426R | 16-Bit Single-Chip Microcomputer | Renesas |
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