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AD8133 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8133
Beschreibung Triple Differential Driver
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 18 Seiten
AD8133 Datasheet, Funktion
Data Sheet
FEATURES
Triple high speed fully differential driver
225 MHz −3 dB large signal bandwidth
Easily drives 1.4 V p-p video signal into source-terminated
100 Ω UTP cable
1600 V/µs slew rate
Fixed internal gain of 2
Internal common-mode feedback network
Output balance error −60 dB @ 50 MHz
Differential input and output
Differential-to-differential or single-ended-to-differential
operation
Adjustable output common-mode voltage
Output pull-down feature for line isolation
Low distortion: 64 dB SFDR @ 10 MHz on 5 V supply,
RL, dm = 200 Ω
Low offset: 4 mV typical output referred on 5 V supply
Low power: 26 mA @ 5 V for three drivers
Wide supply voltage range: +5 V to ±5 V
Available in space-saving packaging: 4 mm × 4 mm LFCSP
APPLICATIONS
KVM (keyboard-video-mouse) networking
UTP (unshielded twisted pair) driving
Differential signal multiplexing
GENERAL DESCRIPTION
The AD8133 is a major advancement beyond using discrete
op amps for driving differential RGB signals over twisted pair
cable. The AD8133 is a triple, low cost differential or single-
ended input to differential output driver, and each amplifier has
a fixed gain of 2 to compensate for the attenuation of line
termination resistors. The AD8133 is specifically designed for RGB
signals but can be used for any type of analog signals or high speed
data transmission. The AD8133 is capable of driving either
Category 5 unshielded twisted pair (UTP) cable or differential
printed circuit board transmission lines with minimal signal
degradation.
The outputs of the AD8133 can be set to a low voltage state to
be used with series diodes for line isolation, allowing easy
differential multiplexing over the same twisted pair cable. The
AD8133 driver can be used in conjunction with the AD8129
and AD8130 differential receivers.
Triple Differential Driver
with Output Pull-Down
AD8133
FUNCTIONAL BLOCK DIAGRAM
OPD 1
VS– 2
–IN A 3
+IN A 4
VS– 5
–OUT A 6
24 23 22 21 20 19
AD8133 18 VOCMC
17 VS+
16 –IN C
15 +IN C
A B C 14 VS–
13 –OUT C
7 8 9 10 11 12
Figure 1.
0
VOUT, dm = 2V p-p
–10 VOUT, cm/VOUT, dm
–20
–30
VS = ±5V
–40
–50
VS = +5V
–60
–70
–80
–90
–100
1
10 100
FREQUENCY (MHz)
Figure 2. Output Balance vs. Frequency
500
Manufactured on Analog Devices’ next generation XFCB
bipolar process, the AD8133 has a large signal bandwidth of
225 MHz and a slew rate of 1600 V/µs. The AD8133 has an
internal common-mode feedback feature that provides output
amplitude and phase matching that is balanced to −60 dB at
50 MHz, suppressing harmonics and minimizing radiated
electromagnetic interference (EMI).
The output common-mode level is easily adjustable by applying
a voltage to the VOCM input pin. The VOCM input can also be used
to transmit signals on the output common-mode voltages.
The AD8133 is available in a 24-lead LFCSP package and can
operate over the temperature range of −40°C to +85°C.
Rev. A
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2004–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD8133 Datasheet, Funktion
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
All VOCM
Power Dissipation
Input Common-Mode Voltage
Storage Temperature
Operating Temperature Range
Lead Temperature Range
(Soldering 10 sec)
Junction Temperature
Rating
12 V
±VS
See Figure 3
±VS
−65°C to +125°C
−40°C to +85°C
300°C
150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, i.e., θJA is specified
for the device soldered in a circuit board in still air.
Table 4. Thermal Resistance with the Underside Pad
Connected to the Plane
Package Type/PCB Type
θJA
Unit
24-Lead LFCSP/4-Layer
70
°C/W
Maximum Power Dissipation
The maximum safe power dissipation in the AD8133 package is
limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the
parametric performance of the AD8133. Exceeding a junction
temperature of 175°C for an extended period of time can result
in changes in the silicon devices potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
AD8133
quiescent current (IS). The load current consists of differential
and common-mode currents flowing to the loads, as well as
currents flowing through the internal differential and common-
mode feedback loops. The internal resistor tap used in the
common-mode feedback loop places a 4 kΩ differential load on
the output. RMS output voltages should be considered when
dealing with ac signals.
Airflow reduces θJA. Also, more metal directly in contact with
the package leads from metal traces, through holes, ground,
and power planes reduces the θJA. The exposed paddle on the
underside of the package must be soldered to a pad on the PCB
surface that is thermally connected to a copper plane in order to
achieve the specified θJA.
Figure 3 shows the maximum safe power dissipation in the
package versus ambient temperature for the 24-lead LFCSP
(70°C/W) package on a JEDEC standard 4-layer board with the
underside paddle soldered to a pad that is thermally connected
to a PCB plane. θJA values are approximations.
4.0
3.5
3.0
2.5
2.0
1.5
LFCSP
1.0
0.5
0
–40 –20 0 20 40 60
AMBIENT TEMPERATURE (°C)
80
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. A | Page 5 of 17

6 Page









AD8133 pdf, datenblatt
Data Sheet
4.5
3.5
2.5
1.5
0.5
–0.5
–1.5
–2.5
–3.5
–4.5
100
VS = +5V
VS = ±5V
1000
LOAD ()
5
4
3
2
1
0
10000
Figure 29. Output Saturation Voltage vs. Single-Ended Output Load
4.0
3.5
VS = ±5V
3.0
2.5 5.0
2.0
VS = +5V
1.5
4.5
4.0
1.0
–40 –25
–5 15 35
TEMPERATURE (°C)
55
3.5
75 85
Figure 30. Positive Output Saturation Voltage vs. Temperature
AD8133
100
10
1
VS = ±5V
0.1
0.01
VS = +5V
0.1 1
10 100
FREQUENCY (MHz)
1000
Figure 31. Single-Ended Output Impedance Magnitude vs. Frequency
–1.0 1.5
–1.5
–2.0
–2.5
VS = +5V
1.0
0.5
0
–3.0
VS = ±5V
–3.5
–40 –25
–5 15 35
TEMPERATURE (°C)
55
75 85
Figure 32. Negative Output Saturation Voltage vs. Temperature
Rev. A | Page 11 of 17

12 Page





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