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Teilenummer | RMPA0963 |
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Beschreibung | Cellular CDMA CDMA2000-1X and WCDMA Power Amplifier Module | |
Hersteller | Fairchild Semiconductor | |
Logo | ||
Gesamt 7 Seiten PRELIMINARY
www.DataSheet4U.com
April 2005
RMPA0963 i-Lo™
Cellular CDMA, CDMA2000-1X and WCDMA
Power Amplifier Module
Features
■ 38% CDMA/WCDMA efficiency at +28 dBm Pout
■ 14% CDMAA/WCDMA efficiency (80 mA total current) at
+16 dBm Pout
■ Meets HSDPA performance requirements
■ Linear operation in low-power mode up to +19 dBm
■ 50% AMPS mode efficiency at +31 dBm Pout
■ Low quiescent current (Iccq): 20 mA in low-power mode
■ Single positive-supply operation with low power and
shutdown modes
• 3.4V typical Vcc operation
• Low Vref (2.85V) compatible with advanced handset
chipsets
■ Compact Lead-free compliant LCC package –
(4.0 X 4.0 x 1.5 mm nominal)
■ Industry standard pinout
■ Internally matched to 50 Ohms and DC blocked RF
input/output
■ Meets IS-95/CDMA2000-1XRTT/WCDMA performance
requirements
Device
General Description
The RMPA0963 Power Amplifier Module (PAM) is Fairchild’s lat-
est innovation in 50 Ohm matched, surface mount modules tar-
geting Cellular CDMA/WCDMA/HSDPA, AMPS and Wireless
Local Loop (WLL) applications. Answering the call for ultra-low
DC power consumption and extended battery life in portable
electronics, the RMPA0963 uses novel proprietary circuitry to
dramatically reduce amplifier current at low to medium RF out-
put power levels (< +16 dBm), where the handset most often
operates. A simple two-state Vmode control is all that is needed
to reduce operating current by more than 50% at 16 dBm output
power, and quiescent current (Iccq) by as much as 70% com-
pared to traditional power-saving methods. No additional cir-
cuitry, such as DC-to-DC converters, are required to achieve
this remarkable improvement in amplifier efficiency. Further, the
4x4x1.5 mm LCC package is pin-compatible and a drop-in
replacement for last generation 4x4 mm PAMs widely used
today, minimizing the design time to apply this performance-
enhancing technology. The multi-stage GaAs Microwave Mono-
lithic Integrated Circuit (MMIC) is manufactured using Fairchild
RF’s InGaP Heterojunction Bipolar Transistor (HBT) process.
i-L
o
™
Functional Block Diagram
Vref 1
Vmode 2
GND 3
RF IN 4
Vcc1 5
MMIC
(Top View)
BIAS/MODE SWITCH
INPUT
MATCH
10 GND
9 GND
OUTPUT
MATCH
8 RF OUT
7 GND
6 Vcc2
11 (paddle ground on package bottom)
©2005 Fairchild Semiconductor Corporation
RMPA0963 i-Lo™ Rev. E
1
www.fairchildsemi.com
Application Information
www.DataSheet4U.com
CAUTION: THIS IS AN ESD SENSITIVE DEVICE
Precautions to Avoid Permanent Device Damage:
• Cleanliness: Observe proper handling procedures to ensure
clean devices and PCBs. Devices should remain in their orig-
inal packaging until component placement to ensure no con-
tamination or damage to RF, DC & ground contact areas.
• Device Cleaning: Standard board cleaning techniques should
not present device problems provided that the boards are
properly dried to remove solvents or water residues.
• Static Sensitivity: Follow ESD precautions to protect against
ESD damage:
• A properly grounded static-dissipative surface on which to
place devices.
• Static-dissipative floor or mat.
• A properly grounded conductive wrist strap for each per-
son to wear while handling devices.
• General Handling: Handle the package on the top with a vac-
uum collet or along the edges with a sharp pair of bent twee-
zers. Avoiding damaging the RF, DC, & ground contacts on
the package bottom. Do not apply excessive pressure to the
top of the lid.
• Device Storage: Devices are supplied in heat-sealed, mois-
ture-barrier bags. In this condition, devices are protected and
require no special storage conditions. Once the sealed bag
has been opened, devices should be stored in a dry nitrogen
environment.
Device Usage:
Fairchild RF recommends the following procedures prior to
assembly.
• Dry-bake devices at 125°C for 24 hours minimum. Note: The
shipping trays cannot withstand 125°C baking temperature
• Assemble the dry-baked devices within 7 days of removal
from the oven.
• During the 7-day period, the devices must be stored in an
environment of less than 60% relative humidity and a max-
imum temperature of 30°C
• If the 7-day period or the environmental conditions have
been exceeded, then the dry-bake procedure must be
repeated.
Solder Materials & Temperature Profile:
• Reflow soldering is the preferred method of SMT attachment.
Hand soldering is not recommended.
Reflow Profile
• Ramp-up: During this stage the solvents are evaporated
from the solder paste. Care should be taken to prevent
rapid oxidation (or paste slump) and solder bursts caused
by violent solvent out-gassing. A typical heating rate is 1-
2°C/sec.
• Pre-heat/soak: The soak temperature stage serves two
purposes; the flux is activated and the board and devices
achieve a uniform temperature. The recommended soak
condition is: 120-150 seconds at 150°C.
• Reflow Zone: If the temperature is too high, then devices
may be damaged by mechanical stress due to thermal
mismatch or there may be problems due to excessive sol-
der oxidation. Excessive time at temperature can enhance
the formation of inter-metallic compounds at the lead/
board interface and may lead to early mechanical failure of
the joint. Reflow must occur prior to the flux being com-
pletely driven off. The duration of peak reflow temperature
should not exceed 10 seconds. Maximum soldering tem-
peratures should be in the range 215-220°C, with a maxi-
mum limit of 225°C.
• Cooling Zone: Steep thermal gradients may give rise to
excessive thermal shock. However, rapid cooling promotes a
finer grain structure and a more crack-resistant solder joint.
The illustration below indicates the recommended soldering
profile.
• Solder Joint Characteristics: Proper operation of this device
depends on a reliable void-free attachment of the heatsink to
the PWB. The solder joint should be 95% void-free and be a
consistent thickness.
• Rework Considerations: Rework of a device attached to a
board is limited to reflow of the solder with a heat gun. The
device should not be subjected to more than 225°C and
reflow solder in the molten state for more than 5 seconds. No
more than 2 rework operations should be performed.
i-L
o
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Recommended Solder Reflow Profile
240
220
200
180
160
140
DEG (°C) 120
100
80
60
40
20
0
0
183°C
1°C/SEC
60
10 SEC
SOAK AT 150°C
FOR 60 SEC
45 SEC
(MAX)
ABOVE
183°C
1°C/SEC
120 180 240 300
TIME (SEC)
RMPA0963 i-Lo™ Rev. E
6
www.fairchildsemi.com
6 Page | ||
Seiten | Gesamt 7 Seiten | |
PDF Download | [ RMPA0963 Schematic.PDF ] |
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