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PDF ADP1829 Data sheet ( Hoja de datos )
| Número de pieza | ADP1829 | |
| Descripción | Step-Down DC-to-DC Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADP1829 (archivo pdf) en la parte inferior de esta página. Total 32 Páginas | ||
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DC-to-DC Controller with Tracking
ADP1829
FEATURES
Fixed frequency operation: 300 kHz, 600 kHz, or
synchronized operation up to 1 MHz
Supply input range: 3.0 V to 18 V
Wide power stage input range: 1 V to 24 V
Interleaved operation results in smaller, low cost
input capacitor
All-N-channel MOSFET design for low cost
±0.85% accuracy at 0°C to 70°C
Soft start, thermal overload, current-limit protection
10 μA shutdown supply current
Internal linear regulator
Lossless RDSON current-limit sensing
Reverse current protection during soft start for handling
precharged outputs
Independent Power OK outputs
Voltage tracking for sequencing or DDR termination
Available in 5 mm × 5 mm, 32-lead LFCSP
APPLICATIONS
Telecommunications and networking systems
Medical imaging systems
Base station power
Set-top boxes
Printers
DDR termination
GENERAL DESCRIPTION
The ADP1829 is a versatile, dual, interleaved, synchronous
PWM buck controller that generates two independent output
rails from an input of 3.0 V to 18 V, with power input voltage
ranging from 1.0 V to 24 V. Each controller can be configured
to provide output voltages from 0.6 V to 85% of the input
voltage and is sized to handle large MOSFETs for point-of-load
regulators. The two channels operate 180° out of phase,
reducing stress on the input capacitor and allowing smaller, low
cost components. The ADP1829 is ideal for a wide range of
high power applications, such as DSP and processor core I/O
power, and general-purpose power in telecommunications,
medical imaging, PC, gaming, and industrial applications.
The ADP1829 operates at a pin-selectable, fixed switching
frequency of either 300 kHz or 600 kHz, minimizing external
component size and cost. For noise-sensitive applications, it can
also be synchronized to an external clock to achieve switching
TYPICAL APPLICATION CIRCUIT
VIN = 12V
180µF
1µF
PV IN
TRK1
TRK2
VREG
EN1
EN2
180µF
IRLR7807Z
0.47µF
1.2V,
6A
560µF
2.2µH
2kΩ
2kΩ
IRFR3709Z
BST1 BST2
0.47µF
DH1
DH2
ADP1829
SW1
SW2
CSL1
DL1
CSL2
DL2
PGND2
2kΩ
IRFR3709Z
IRLR7807Z
2.2µH
2kΩ
1.8V,
8A
560µF
390pF
2kΩ
4.53kΩ 3900pF
PGND1 FB2
FB1 COMP2
COMP1
FREQ
LDOSD
GND SYNC
390pF
1kΩ
3900pF 4.53kΩ
Figure 1.
frequencies between 300 kHz and 1 MHz. The ADP1829
includes soft start protection to prevent inrush current from the
input supply during startup, reverse current protection during
soft start for precharged outputs, as well as a unique adjustable
lossless current-limit scheme utilizing external MOSFET sensing.
For applications requiring power supply sequencing, the
ADP1829 also provides tracking inputs that allow the output
voltages to track during startup, shutdown, and faults. This
feature can also be used to implement DDR memory bus
termination.
The ADP1829 is specified over the −40°C to +125°C junction
temperature range and is available in a 32-lead LFCSP package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
IN, EN1, EN2
BST1, BST2
BST1, BST2 to SW1, SW2
CSL1, CSL2
SW1, SW2
DH1
DH2
DL1, DL2 to PGND
PGND to GND
LDOSD, SYNC, FREQ, COMP1,
COMP2, SS1, SS2, FB1, FB2, VREG,
PV, POK1, POK2, TRK1, TRK2
θJA 4-Layer
(JEDEC Standard Board)1, 2
Operating Ambient Temperature
Operating Junction Temperature3
Storage Temperature
Rating
−0.3 V to +20 V
−0.3 V to +30 V
−0.3 V to +6 V
−1 V to +30 V
−2 V to +30 V
SW1 − 0.3 V to BST1 + 0.3 V
SW2 − 0.3 V to BST2 + 0.3 V
−0.3 V to PV + 0.3 V
±2 V
−0.3 V to +6 V
45°C/W
−40°C < TA< +85°C
−40°C < TJ < +125°C
−65°C to +150°C
1 Measured with exposed pad attached to PCB.
2 Junction-to-ambient thermal resistance (θJA) of the package is based on
modeling and calculation using a 4-layer board. The junction-to-ambient
thermal resistance is application and board-layout dependent. In applica-
tions where high maximum power dissipation exists, attention to thermal
dissipation issues in board design is required. For more information, refer to
Application Note AN-772, A Design and Manufacturing Guide for the Lead
Frame Chip Scale Package (LFCSP).
3 In applications where high power dissipation and poor package thermal
resistance are present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA_MAX) is dependent on the
maximum operating junction temperature (TJ_MAX_OP = 125oC), the maximum
power dissipation of the device in the application (PD_MAX), and the junction-
to-ambient thermal resistance of the part/package in the application (θJA)
and is given by the following equation: TA_MAX = TJ_MAX_OP – (θJA × PD_MAX).
ADP1829www.DataSheet4U.com
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 32
5 Page 
T
VOUT11,0A0Cm-VC/ODUIVPLED,
LOAD ON
LOAD OFF
LOAD OFF
100µs/DIV
Figure 16. 1.5 A to 15 A Load Transient Response, VIN = 12 V
T
SS1, 0.5V/DIV
VOUT1, 0.5V/DIV
INPUT CURRENT, 0.2A/DIV
SHORT CIRCUIT APPLIED
4ms/DIV
SHORT CIRCUIT REMOVED
Figure 17. Output Short-Circuit Response
T
SWITCH NODE
CHANNEL 1
SWITCH NODE CHANNEL 2
400ns/DIV
Figure 18. Out-of-Phase Switching, Internal Oscillator
ADP1829www.DataSheet4U.com
T EXTERNAL CLOCK, FREQUENCY = 1MHz
SW PIN, CHANNEL 1
SW PIN, CHANNEL 2
400ns/DIV
Figure 19. Out-of-Phase Switching, External 1 MHz Clock
T EXTERNAL CLOCK, FREQUENCY = 2MHz
SW PIN, CHANNEL 1
SW PIN, CHANNEL 2
200ns/DIV
Figure 20. Out-of-Phase Switching, External 2 MHz Clock
VIN = 12V
T
VOUT1, 2V/DIV
EN1, 5V/DIV
10ms/DIV
Figure 21. Enable Pin Response, VIN = 12 V
Rev. 0 | Page 11 of 32
11 Page | ||
| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet ADP1829.PDF ] | |
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