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3BR1065JF Schematic ( PDF Datasheet ) - Infineon Technologies

Teilenummer 3BR1065JF
Beschreibung ICE3BR1065JF
Hersteller Infineon Technologies
Logo Infineon Technologies Logo 




Gesamt 36 Seiten
3BR1065JF Datasheet, Funktion
Version 2.0, 11 Sep 2008
www.DataSheet4U.com
C o o l S E T ®- F 3 R
ICE3BR1065JF
Off-Line SMPS Current Mode
Controller with integrated 650V
CoolMOS®and Startup cell
(frequency jitter Mode) in FullPak
Power Management & Supply
Never stop thinking.






3BR1065JF Datasheet, Funktion
CoolSET®-F3R
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Pin Configuration and Functionality
1 Pin Configuration and Functionality
1.1
Pin
1
2
3
4
Pin Configuration with PG-TO220-6-
247
Symbol Function
Drain
CS
BA
VCC
650V1) CoolMos® Drain
Current Sense/
650V1) CoolMOS® Source
extended Blanking & external
Auto Restart enable
Controller Supply Voltage
1.2 Pin Functionality
Drain (Drain of integrated CoolMOS®)
Pin Drain is the connection to the Drain of the internal
CoolMOS® and the HV of the startup cell.
CS (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
integrated CoolMOS®. If CS voltage reaches the
internal threshold of the Current Limit Comparator, the
Driver output is immediately switched off. Furthermore
the current information is provided for the PWM-
Comparator to realize the Current Mode.
5 GND
6 FB
1) at Tj=110°C
Controller Ground
Feedback
Package PG-TO220-6-247
BA (extended Blanking & Auto-restart enable)
The BA pin combines the functions of extendable
blanking time for over load protection and the external
auto-restart enable. The extendable blanking time
function is to extend the built-in 20 ms blanking time by
adding an external capacitor at BA to ground. The
external auto-restart enable function is an external
access to stop the gate switching and force the IC to
enter auto-restart mode. It is triggered by pulling down
the BA pin to less than 0.33V.
VCC (Power Supply)
The VCC pin is the positive supply of the IC. The
operating range is between 10.5V and 25V.
1 23456
GND (Ground)
The GND pin is the ground of the controller.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle. The FB-
Signal is the only control signal in case of light load at
the Active Burst Mode.
Figure 1
Pin Configuration PG-TO220-6-247
(front view)
Version 2.0
6 11 Sep 2008

6 Page









3BR1065JF pdf, datenblatt
CoolSET®-F3R
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Functional Description
Within the soft start period, the duty cycle is increasing
from zero to maximum gradually (see Figure 12).
In addition to Start-Up, Soft-Start is also activated at
each restart attempt during Auto Restart.
VSoftS
VSOFTS32
tSoft-Start
3.5 PWM Section
Oscillator
Duty Cycle
max
Clock
Frequency
Jitter
0.75
PWM Section
VFB
4.5V
VOUT
VOUT
tStart-Up
t
Soft Start
Block
Soft Start
Comparator
PWM
t Comparator
Current
Limiting
FF1
1S
Gate Driver
G8 R Q
&
G9
CoolMOS®
Gate
t
Figure 13 Start Up Phase
The Start-Up time tStart-Up before the converter output
voltage VOUT is settled, must be shorter than the Soft-
Start Phase tSoft-Start (see Figure 13).
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
integrated CoolMOS®, the clamp circuit and the output
overshoot and it helps to prevent saturation of the
transformer during Start-Up.
Figure 14 PWM Section Block
3.5.1
Oscillator
The oscillator generates a fixed frequency of 67KHz
with frequency jittering of ±4% (which is ±2.7KHz) at a
jittering period of 4ms.
A capacitor, a current source and current sink which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very accurate switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum duty cycle limitation of Dmax=0.75.
Once the Soft Start period is over and when the IC goes
into normal operating mode, the switching frequency of
the clock is varied by the control signal from the Soft
Start block. Then the switching frequency is varied in
range of 67KHz ± 2.7KHz at period of 4ms.
3.5.2
PWM-Latch FF1
The output of the oscillator block provides continuous
pulse to the PWM-Latch which turns on/off the internal
CoolMOS®. After the PWM-Latch is set, it is reset by
the PWM comparator, the Soft Start comparator or the
Current -Limit comparator. When it is in reset mode, the
output of the driver is shut down immediately.
Version 2.0
12 11 Sep 2008

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