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ADF5001 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADF5001
Beschreibung 4 GHz to 18 GHz Divide-by-4 Prescaler
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 13 Seiten
ADF5001 Datasheet, Funktion
4 GHz to 18 GHz Divide-by-4 Prescaler
ADF5001
FEATURES
Divide-by-4 prescaler
High frequency operation: 4 GHz to 18 GHz
Integrated RF decoupling capacitors
Low power consumption
Active mode: 30 mA
Power-down mode: 7 mA
Low phase noise: −150 dBc/Hz
Single dc supply: 3.3 V compatible with ADF4xxx PLLs
Temperature range: −40oC to +105oC
Small package: 3 mm × 3 mm LFCSP
APPLICATIONS
PLL frequency range extender
Point-to-point radios
VSAT radios
Communications test equipment
GENERAL DESCRIPTION
The ADF5001 prescaler is a low noise, low power, fixed RF
divider block that can be used to divide down frequencies as
high as 18 GHz to a lower frequency suitable for input into a
PLL IC, such as the ADF4156 or ADF4106. The ADF5001
provides a divide-by-4 function. The ADF5001 operates off a
3.3 V supply and has differential 100 Ω RF outputs to allow
direct interface to the differential RF inputs of PLLs such as the
ADF4156 and ADF4106.
FUNCTIONAL BLOCK DIAGRAM
CE
RFIN
3pF
50
BIAS
DIVIDE
BY 4
ADF5001
VDDx
100
100
1pF
1pF
RFOUT
RFOUT
GND
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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ADF5001 Datasheet, Funktion
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADF5001
GND 1
RFIN 2
GND 3
GND 4
PIN 1
INDICATOR
ADF5001
TOP VIEW
(Not to Scale)
12 GND
11 RFOUT
10 RFOUT
9 GND
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PADDLE MUST BE
CONNECTED TO GND.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 3, 4, 5, 8, 9, 12, GND
13, 16
RF Ground. All ground pins should be tied together.
2 RFIN Single-Ended 50 Ω Input to the RF Prescaler. This pin is ac-coupled internally via a 3 pF capacitor.
6 NC No Connect. This pin can be left unconnected.
7 CE Chip Enable. This pin is active high. When CE is brought low, the part enters into power-down mode. If
this functionality is not required, the pin can remain unconnected because it is pulled up internally
through a weak pull-up resistor.
10
RFOUT
Divided Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied to VDD2 and an
ac-coupling capacitor of 1 pF.
11
RFOUT
Complementary Divided Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied
to VDD2 and an ac-coupling capacitor of 1 pF.
14
VDD2
Voltage Supply for the Output Stage. Decouple this pin to ground with a 1 nF capacitor and tie it
directly to VDD1.
15
VDD1
Voltage Supply for the Input Stage and Divider Block. Decouple this pin to ground with a 1 nF capacitor.
N/A1
EP The LFCSP package has an exposed paddle that must be connected to GND.
1 N/A means not applicable.
Rev. A | Page 5 of 12

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ADF5001 pdf, datenblatt
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ADF5001
Rev. A | Page 11 of 12

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