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PDF ADL5360 Data sheet ( Hoja de datos )
| Número de pieza | ADL5360 | |
| Descripción | Dual 900MHz Balanced Mixer | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Preliminary Technical Data
FEATURES
RF Frequency 700MHz to 1000MHz
IF Frequency 50MHZ to 350MHz
Power Conversion Gain of 8.5dB
SSB Noise Figure of 9.5dB
SSB NF with +10dBm blocker of 16.5dB
Input IP3 of 26dBm
Input P1dB of 10 dBm
Typical LO Drive of 0 dBm
Single-ended, 50Ω RF and LO Input Ports
High Isolation SPDT LO Input Switch
Single Supply Operation: 3.3 to 5 V
Exposed Paddle 6 x 6 mm, 36 Lead LFCSP Package
APPLICATIONS
Cellular Base Station Receivers
Main and Diversity Receiver Designs
Radio Link Downconverters
GENERAL DESCRIPTION
The ADL5360 utilizes two highly linear doubly balanced passive
mixer cores along with integrated RF and LO balancing
circuitry to enable single-ended operation. The ADL5360
incorporates two RF baluns allowing for optimal main and
www.DadtiavSerhseiteyt4mUi.cxoemr performance over a 700 to 1000 MHz RF input
frequency range using low-side LO injection. The balanced
passive mixer arrangement provides good LO to RF leakage,
typically better than -25dBm, and excellent intermodulation
performance. The balanced mixer cores also provide extremely
high input linearity allowing the device to be used in
demanding cellular applications where in-band blocking signals
may otherwise result in the degradation of dynamic
performance. High linearity IF buffer amps follow the passive
mixer cores, to yield a typical power conversion gain of 9.5dB.
(For a higher IIP3 version of the dual mixer without the IF
amplifiers, please contact the factory).
The ADL5360 provides two switched LO paths that can be
utilized in TDD applications where it is desirable to rapidly
alternate between two local oscillators. LO current can be
externally set using a resistor to minimize DC current
REV. PrA
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
Dual 900MHz Balanced Mixer
with Low Side LO Buffer,
IF Amp, and RF Balun
ADL5360
Figure 1. Functional Block Diagram
commensurate with the desired level of performance. An
additional 3V logic pin is provided to power down (<100uA)
the circuit when desired.
For low voltage applications, the ADL5360 is capable of
operation at voltages down to 3V with substantially reduced DC
current.
The ADL5360 is fabricated using a BiCMOS high performance
IC process. The device is available in a 6mm x 6mm 36-lead
LFCSP package and operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2008 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADL5360
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic
Function
1 MNIN
RF Input for Main Channel. Internally matched to 50Ω. Must be ac-coupled.
2 MNCT
Center Tap for Main Channel Input Balun. Should be bypassed to ground using low inductance capacitor.
3, 5, 7,
12, 20,
34
COMM
Device Common (DC Ground).
4,, 6, 10,
16, 21,
30, 36
VPOS
Positive Supply Voltage.
8 DVCT
Center Tap for Diversity Channel Input Balun. Should be bypassed to ground using low inductance capacitor.
9 DVIN
RF Input for Diversity Channel. Internally matched to 50Ω. Must be ac-coupled.
11 DVGM
Diverstiy Amplifier Bias Setting. Connect 1.2kΩ resistor to ground for typical operation.
www.Da1t3a,S1h4eet4U.DcoVmOP, DVON
Diversity Channel Differential Open-Collector Outputs. DVOP and DVON should be pulled-up to VCC using
pull-up choke inductors.
15 DVLE
Diversity Channel External Inductor. Connect 10nH inductor to ground for typical operation.
17 DVLG
Diverstiy Channel LO Buffer Bias Setting. Connect 390Ω resistor to ground for typical operation.
18, 28 NC
No Connect.
19, L0I1
Local Oscillator Input 1. Internally matched to 50Ω. Must be ac-coupled.
22 PWDN
Connect to Ground for Normal Operation. Connect pin to 3.3V for disable mode.
23 LOSW
Local Oscillator Input Selection Switch. Set LOSW high to select LOI1, and set low to select LOI2.
24, 25,
26
VGS0, VGS1,
VGS2
Gate to Source Control Voltages. For typical operation set VGS2 high and VGS0 and VGS1 to low logic level.
27 LOI2
Local Oscillator Input 2. Internally matched to 50Ω. Must be ac-coupled.
29 MNLG
Main Channel LO Buffer Bias Setting. Connect 390Ω resistor to ground for typical operation.
31 MNLE
Main Channel External Inductor. Connect 10nH inductor to ground for typical operation.
32, 33
MNOP, MNON Main Channel Differential Open-Collector Outputs. MNOP and MNON should be pulled-up to VCC using pull-
up choke inductors.
35 MNGM
Main Amplifier Bias Setting. Connect 1.2kΩ resistor to ground for typical operation.
REV. PrA | Page 5 of 9
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| PDF Descargar | [ Datasheet ADL5360.PDF ] | |
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