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PDF PSMN016-100YS Data sheet ( Hoja de datos )
| Número de pieza | PSMN016-100YS | |
| Descripción | N-channel 100V Standard Level MOSFET | |
| Fabricantes | NXP Semiconductors | |
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PSMN016-100YS
N-channel 100 V 16 mΩ standard level MOSFET in LFPAK
Rev. 02 — 25 January 2010
Objective data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
Advanced TrenchMOS provides low
RDSon and low gate charge
High efficiency gains in switching
power converters
Improved mechanical and thermal
characteristics
LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications
DC-to-DC converters
Lithium-ion battery protection
Load switching
Motor control
Server power supplies
1.4 Quick reference data
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Table 1. Quick reference
Symbol Parameter
Conditions
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
ID drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
Tj junction temperature
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
Dynamic characteristics
VGS = 10 V; Tj(init) = 25 °C;
ID = 51 A; Vsup ≤ 100 V;
unclamped; RGS = 50 Ω
QGD
QG(tot)
gate-drain charge
total gate charge
VGS = 10 V; ID = 30 A;
VDS = 50 V;
see Figure 14 and 15
Min Typ Max Unit
- - 100 V
- - 51 A
- - 117 W
-55 -
175 °C
- - 87 mJ
- 16 - nC
- 54 - nC
1 page  
NXP Semiconductors
PSMN016-100YS
N-channel 100 V 16 mΩ standard level MOSFET in LFPAK
6. Characteristics
Table 6. Characteristics
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source
breakdown voltage
gate-source threshold
voltage
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11 and 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 100 V; VGS = 0 V; Tj = 125 °C
VDS = 100 V; VGS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 175 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13
RG internal gate resistance f = 1 MHz
(AC)
Dynamic characteristics
QG(tot)
total gate charge
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QGS gate-source charge
QGS(th)
pre-threshold
gate-source charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 30 A; VDS = 50 V; VGS = 10 V;
see Figure 14 and 15
ID = 30 A; VDS = 50 V; VGS = 10 V;
see Figure 14
QGS(th-pl) post-threshold
gate-source charge
QGD
gate-drain charge
ID = 30 A; VDS = 50 V; VGS = 10 V;
see Figure 14 and 15
VGS(pl)
gate-source plateau
voltage
VDS = 50 V; see Figure 14 and 15
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 50 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 50 V; RL = 1.7 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω; Tj = 25 °C
Min Typ Max Unit
90 - - V
100 - - V
1- - V
234V
- - 4.6 V
- - 100 µA
-
0.06 2
µA
- 10 100 nA
- 10 100 nA
- - 28.8 mΩ
- - 44.8 mΩ
-
13.6 16
mΩ
- 0.6 - Ω
- 42 - nC
- 54 - nC
- 11 - nC
- 8 - nC
- 3.2 - nC
- 16 - nC
- 4.2 - V
- 2744 - pF
- 205 - pF
- 135 - pF
- 19 - ns
- 24 - ns
- 47 - ns
- 21 - ns
PSMN016-100YS_2
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 25 January 2010
© NXP B.V. 2010. All rights reserved.
5 of 14
5 Page 
NXP Semiconductors
PSMN016-100YS
N-channel 100 V 16 mΩ standard level MOSFET in LFPAK
8. Revision history
Table 7. Revision history
Document ID
Release date Data sheet status
PSMN016-100YS_2
Modifications:
20100125
Objective data sheet
• Various changes to content.
PSMN016-100YS_1
20100105
Objective data sheet
Change notice
-
-
Supersedes
PSMN016-100YS_1
-
www.DataSheet4U.com
PSMN016-100YS_2
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 25 January 2010
© NXP B.V. 2010. All rights reserved.
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