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PDF WCMC1616V9X Data sheet ( Hoja de datos )
| Número de pieza | WCMC1616V9X | |
| Descripción | 1Mb x 16 Pseudo Static RAM | |
| Fabricantes | Weida Semiconductor | |
| Logotipo |  |
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ADVANCE INFORMATION
WCMC1616V9X
Features
• 1T Cell, PSRAM Architecture
• High speed: 70 ns
• Wide Voltage range:
— VCC range: 2.7V to 3.3V
• Low active power
— Typical active current: 2 mA @ f = 1 MHz
— Typical active current: 13 mA @ f = fMAX
• Low standby power
• Automatic power-down when deselected
Functional Description[1]
The WCMC1616V9X is a high-performance CMOS pseudo
static RAMs (PSRAM) organized as 1M words by 16 bits that
supports an asynchronous memory interface. This device
features advanced circuit design to provide ultra-low active
current. This is ideal for providing More Battery LifeTM
Logic Block Diagram
1Mb x 16 Pseudo Static RAM
(MoBL®) in portable applications such as cellular telephones.
The device can be put into standby mode reducing power
consumption by more than 99% when deselected using CE
LOW, CE 2 HIGH or both BHE and BLE are HIGH. The
input/output pins (I/O0 through I/O15) are placed in a
high-impedance state when: deselected (CE HIGH, CE 2 LOW
OE is deasserted HIGH), or during a write operation (Chip
Enabled and Write Enable WE LOW). The device also has an
automatic power-down feature that significantly reduces
power consumption by 99% when addresses are not toggling
even when the chip is selected (Chip Enable CE LOW, CE 2
HIGH and both BHE and BLE are LOW). Reading from the
device is accomplished by asserting the Chip Enables (CE
LOW and CE 2 HIGH) and Output Enable (OE) LOW while
forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE)
is LOW, then data from the memory location specified by the
address pins will appear on I/O0 to I/O7. If Byte High Enable
(BHE ) is LOW, then data from memory will appear on I/O8 to
I/O15. See the Truth Table for a complete description of read
and write modes.
DATA IN DRIVERS
www.DataSheet4U.com
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1M x 16
RAM Array
1T
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
Power -Down
Circuit
BHE
BLE
BHE
WE
OE
BLE
CE2
CE
CE2
CE
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress .com.
WeidaSemiconductor, Inc.
Document #: 38-14027 Rev. **
Revised August 22, 2001
1 page  
ADVANCE INFORMATION
WCMC1616V9X
AC Test Loads and Waveforms
VCC
OUTPUT
R1
30 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
VCC
10%
90%
90%
10%
GND
R2 Rise Time = 1 V/ns
Fall Time = 1 V/ns
Equivalento:
THÉVENINEQUIVALENT
OUTPUT
RTH
VTH
Parameters
R1
R2
RTH
VTH
3.0V Vcc
1179
1941
733
1.87
Unit
W
W
W
V
www.DataSheet4U.com
Document #: 38-14027 Rev. **
Page 5 of 13
5 Page 
ADVANCE INFORMATION
WCMC1616V9X
Ordering Information
Speed
(ns)
70
Ordering Code
WCMC1616V9X-FI70
Package
Name
BV48A
Package Type
48-ball Fine Pitch BGA (6.0 x 8.0 x 1.2 mm)
Operating
Range
Industrial
Package Diagrams
48-Ball (6 mm x 8 mm x 1.2 mm) FBGA BA48K
www.DataSheet4U.com
Document #: 38-14027 Rev. **
51-85193-*A
Page 11 of 13
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet WCMC1616V9X.PDF ] | |
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