WCMA4008C1X Datasheet PDF - Weida Semiconductor
| Part Number | WCMA4008C1X | |
| Description | 512K x 8 Static RAM | |
| Manufacturers | Weida Semiconductor | |
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WCMA4008C1X
Features
• Voltage Range
— 4.5V–5.5V
• Low active power
— Typical active current: 2.5 mA @ f = 1 MHz
— Typical active current: 12.5 mA @ f = fmax
• Low standby current
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• CMOS for optimum speed/power
Functional Description
The WCMA4008C1X is a high-performance CMOS static
RAM organized as 512K words by 8 bits. Easy memory expan-
sion is provided by an active LOW Chip Enable (CE), an active
Logic Block Diagram
512K x 8 Static RAM
LOW Output Enable (OE), and three-state drivers. This device
has an automatic power-down feature that reduces power
consumption by more than 99% when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O0 through I/O7) is then written into the location speci-
fied on the address pins (A0 through A18).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH for read. Under these conditions, the con-
tents of the memory location specified by the address pins will
appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The WCMA4008C1X is available in a standard 32-pin
450-mil-wide body width SOIC.
A0
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A4
A5
A6
A7
A12
A14
A16
A17
CE
WE
OE
INPUT BUFFER
512 x 256 x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
Pin Configuration
Top View
SOIC
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 A15
30 A18
29 WE
28 A13
27 A8
26
25
A9
A11
24 OE
23 A10
22 CE
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
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WCMA4008C1X
Data Retention Characteristics (Over the Operating Range)
Parameter
VDR
ICCDR
tCDR[3]
tR[8]
Description
VCC for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery
Time
Conditions
No input may exceed
VCC + 0.3V
VCC = VDR = 3.0V
CE > VCC – 0.3V
VIN > VCC – 0.3V or
VIN < 0.3V
Data Retention Waveform
Min.
2.0
0
tRC
Typ.[2]
Max.
20
DATA RETENTION MODE
VCC
3.0V
VDR > 2V
3.0V
tCDR
tR
CE
Unit
V
µA
ns
ns
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| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ WCMA4008C1X.PDF Datasheet ] | |
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