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PDF WCMA1008C1X Data sheet ( Hoja de datos )
| Número de pieza | WCMA1008C1X | |
| Descripción | 128K x 8 Static RAM | |
| Fabricantes | Weida Semiconductor | |
| Logotipo |  |
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WCMA1008C1X
Features
• Voltage Range
— 4.5V–5.5V
• Low active power
— Typical active current: 6 mA @ f = fmax (70 ns speed)
• Low standby current
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1, CE2, and OE fea-
tures
• CMOS for optimum speed/power
Functional Description
The WCMA1008C1X is a high-performance CMOS static
RAM organized as 128K words by 8 bits. Easy memory expan-
sion is provided by an active LOW Chip Enable (CE1), an ac-
tive HIGH Chip Enable (CE2), an active LOW Output Enable
Logic Block Diagram
128K x 8 Static RAM
(OE), and three-state drivers. This device has an automatic
power-down feature that reduces power consumption by more
than 75% when deselected.
Writing to the device is accomplished by taking Chip Enable 1
(CE1) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE2) input HIGH. Data on the eight I/O pins (I/O0 through
I/O7) is then written into the location specified on the address
pins (A0 through A16).
Reading from the device is accomplished by taking Chip En-
able 1 (CE1) and Output Enable (OE) LOW while forcing Write
Enable (WE) and Chip Enable 2 (CE2) HIGH. Under these
conditions, the contents of the memory location specified by
the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW, CE2 HIGH, and WE LOW)
The WCMA1008C1X is available in a standard 32-pin
450-mil-wide body width SOIC and 32-pin TSOP type I.
www.DataSheet4U.com A0
A1
A2
A3
A4
A5
A6
A7
A8
CCEE21
WE
OE
INPUT BUFFER
512x 256x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
Pin Configuration
Top View
SOIC
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 A15
30 A18
29 WE
28 A13
27 A8
26
25
A9
A11
24 OE
23 A10
22 CE
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
AAAA111389
WE
CAE152
VNCCC
A16
AAA11427
A6
AA45
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSOP I
Top View
(not to scale)
32 OE
31
30
29
28
27
AIIICI////OOOO1E607561
26
25
24
GII//OON43D
23
22
21
20
19
18
17
IIIAAAA///OOO1032 210
April 5, 2002
1 page  
WCMA1008C1X
Data Retention Characteristics (Over the Operating Range)
Parameter
VDR
ICCDR
tCDR[3]
tR[8]
Description
VCC for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery
Time
Conditions
VCC = VDR = 3.0V,
CE1 ≥ VCC – 0.3V,
CE2 < 0.3V
VIN ≥ VCC – 0.3V or,
VIN ≤ 0.3V
Data Retention Waveform
Min.
2.0
0
70
Typ.[2]
1.5
Max.
20
DATA RETENTION MODE
VCC
3.0V
VDR > 2V
3.0V
tCDR
tR
CE
Unit
V
µA
ns
ns
www.DataSheet4U.com
Page 5 of 11
5 Page 
WCMA1008C1X
Document Title: WCMA1008C1X, 128K x 8 Static RAM
REV.
Spec #
ECN #
Issue Date
** 38-14022 115241
4/24/2002
Orig. of Change
Description of Change
MGN
New Datasheet
www.DataSheet4U.com
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet WCMA1008C1X.PDF ] | |
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