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PDF R2J20651ANP Data sheet ( Hoja de datos )
| Número de pieza | R2J20651ANP | |
| Descripción | Integrated Driver | |
| Fabricantes | Renesas Technology | |
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Preliminary
R2J20651ANP
Integrated Driver – MOS FET (DrMOS)
REJ03G1792-0100
Rev.1.00
Jun 03, 2009
Description
The R2J20651ANP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver
in a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this
device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap Schottky barrier
diode (SBD), eliminating the need for an external SBD for this purpose.
Features
• Compliant with Intel 6 × 6 DrMOS specification
• Built-in power MOS FET suitable for applications with 5 V/12 V input
• Built-in driver circuit which matches the power MOS FET
• Built-in tri-state input function which can support a number of PWM controllers
• VIN operating-voltage range: 16 V max
• High-frequency operation (above 1 MHz) possible
• Large average output current (Max. 35 A)
• Achieve low power dissipation
• Controllable driver: Remote on/off
• Low-side MOS FET disabled function for DCM operation
• Built-in thermal warning
• Built-in Schottky diode for bootstrapping
• Small package: QFN40 (6 mm × 6 mm × 0.95 mm)
• Terminal Pb-free/Halogen-free
Outline
www.DataSheet4U.com
THWN
DISBL#
LSDBL#
PWM
VCIN BOOT
Integrated Driver-MOS FET (DrMOS)
QFN40 package 6 mm × 6 mm
GH VIN
1
40
Driver
Pad
10
High-side
MOS Pad
11
MOS FET Driver
VSWH
Low-side MOS Pad
CGND VDRV
GL PGND
31
30
(Bottom view)
20
21
REJ03G1792-0100 Rev.1.00 Jun 03, 2009
Page 1 of 17
1 page  
R2J20651ANP
Preliminary
Electrical Characteristics
(Ta = 25°C, VCIN = 5 V, VDRV = 5 V, VSWH = 0 V, unless otherwise specified)
Item
Symbol Min Typ Max Units
Test Conditions
Supply
VCIN start threshold
VCIN shutdown threshold
UVLO hysteresis
VCIN operating current
VH
VL
dUVL
ICIN
3.1 3.5 3.9
V
2.7 3.0 3.3
V
— 0.5 —
V VH – VL
— 29 — mA fPWM = 1 MHz,
Ton_pwm = 120 ns
VCIN disable current
ICIN-DISBL
— — 50 μA DISBL# = 0 V, PWM = 0 V,
LSDBL# = Open
PWM
input
PWM rising threshold
PWM falling threshold
VH-PWM
VL-PWM
3.3 3.7 4.1
0.9 1.2 1.5
V
V
PWM input resistance
RIN-PWM
10 20 40 kΩ PWM = 1 V
Tri-state shutdown window
Shutdown hold-off time
VIN-SD
tHOLD-OFF *1
VL-PWM
—
—
100
VH-PWM
—
V
ns
DISBL# Disable threshold
input
Enable threshold
VDISBL
VENBL
0.9 1.2 1.5
1.9 2.4 2.9
V
V
Input current
IDISBL
— 0.5 2.0 μA DISBL# = 1 V
LSDBL# Low-side activation threshold VLSDBLH
input
Low-side disable threshold
VLSDBLL
1.9 2.4 2.9
0.9 1.2 1.5
V
V
Thermal
warning
Input current
Warning temperature
Temperature hysteresis
THWN on resistance
ILSDBL
TTHWN *1
THYS *1
RTHWN *1
–54 –27 –13.5 μA LSDBL# = 1 V
110 130
—
°C Driver IC temperature
— 15 — °C
1.0 2.5 4.0 kΩ THWN = 1 V
THWN leakage current
ILEAK
— 0.001 1.0
μA THWN = 5 V
Note: 1. Reference values for design. Not 100% tested in production.
www.DataSheet4U.com
REJ03G1792-0100 Rev.1.00 Jun 03, 2009
Page 5 of 17
5 Page 
R2J20651ANP
Typical Data (cont.)
Power Loss vs. Output Inductance
1.5
VIN = 12 V
1.4
VCIN = 5 V
VOUT = 1.3 V
1.3
fPWM = 600 kHz
IOUT = 25 A
1.2
1.1
1.0
0.9
0.8
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Output Inductance (μH)
Preliminary
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
4.0
Power Loss vs. VCIN
VIN = 12 V
VOUT = 1.3 V
fPWM = 600 kHz
L = 0.45 μH
IOUT = 25 A
4.5 5.0 5.5
VCIN (V)
6.0
Average ICIN vs. Switching Frequency
50
VIN = 12 V
VCIN = 5 V
40
VOUT = 1.3 V
L = 0.45 μH
IOUT = 0 A
30
20
10
www.DataSheet4U.com
0
250
500 750 1000
Switching Frequency (kHz)
1250
REJ03G1792-0100 Rev.1.00 Jun 03, 2009
Page 11 of 17
11 Page | ||
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| PDF Descargar | [ Datasheet R2J20651ANP.PDF ] | |
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