PDF ADSY8401 Data sheet ( Hoja de datos )

Número de pieza	ADSY8401
Descripción	LCD Level Shifters
Fabricantes	Analog Devices
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No Preview Available ! LCD Level Shifters with VCOM, NRS Buffers, and High Voltage Edge Detector ADSY8401 FEATURES Complete suite of level shifters Eight inverting and three complementary level shifters for LCD timing High voltage edge detector Integrated low offset buffer for VCOM drives high capacitive loads MUXed input, low offset buffer for 2-level precharge drives high capacitive loads High current buffer for precharge provides high current drive into large capacitive loads Low power dissipation: 576 mW Available in 48-lead 7 mm × 7 mm LFCSP E-pad PRODUCT DESCRIPTION The ADSY8401 provides fast, 3 V to 15 V level shifters for LCD panel timing signals. An integrated low offset analog buffer is capable of driving the high capacitive loads. A 2:1 MUX input, low offset buffer simplifies application of 2-level precharge signals. A high current buffer provides high slew rates for large capacitive loads. The ADSY8401 is fabricated on ADI’s fast, 26 V XFHV process, providing fast input logic, high voltage level shifters, and precision drive amplifiers on the same chip. The ADSY8401 dissipates 576 mW nominal static power. The ADSY8401 is offered in a 48-lead 7 mm × 7 mm LFCSP www.DaEt-apSahdepeta4cUk.acgoemand operates over the commercial temperature range of 0°C to 85°C. FUNCTIONAL BLOCK DIAGRAM DVCC AVCCL AVCC DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 DI10 DI11 8 3 ADSY8401 8 3 3 DO1 DO2 DO3 DO4 DO5 DO6 DO7 DO8 DO9T DO10T DO11T DO9C DO10C DO11C DTCTI R DTCTO S AMPI SEL MUXA MUXB +1 +1 AMPO MUXO BFRI GSW +1 BFRO DGND AGNDL Figure 1. AGND Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. 1 page Parameter Level Shifting Edge Detector Section Input Low Voltage, VIL Input High Voltage, VIH Input Rising Edge Threshold Voltage, VTH LH Input Falling Edge Threshold Voltage, VTH HL Output High Voltage, VOH Output Low Voltage, VOL Input Current High State, IIH Input Current, IIL Input Rising Edge Propagation Delay Time, t19 Input Falling Edge Propagation Delay Time, t20 t20 Variation with Temperature, ∆t20 Output Rise, Fall Time, tr Grounded-Mode Switch GSW INPUT CHARACTERISTICS CIN RIN IIH IIL VIH VIL VTH Power Supplies Operating Range, DVCC Quiescent Current, DVCC Operating Range, AVCC, AVCCL1, 2, 3 Quiescent Current, AVCCL1 Quiescent Current, AVCCL2 Quiescent Current, AVCCL3 Quiescent Current, AVCCL2 Quiescent Current, AVCCL3 www.DaQtuaiSehseceent4tUC.cuorrment, AVCC Operating Temperature Ambient Temperature Range, TA Conditions CL = 10 pF TA = 25°C to 85°C 10% to 90% DI1 − DI11 ≤ VIL DI1 − DI11 ≤ VIL DI1 − DI11 ≥ VIH DI1 − DI11 ≥ VIH In still air ADSY8401 Min Typ Max Unit AVCC − 1.5 DVCC − 0.5 −2.5 AGND + 1.5 AGND + 3 AVCC − 3 DVCC − 0.25 0.25 1.2 −1.2 15.5 16.5 2 6 0.5 2.5 V V V V V V µA µA ns ns ns ns 3 pF 50 kΩ 0.6 µA −70 µA 2V 0.8 V 1.65 V 3 3.3 3.6 V 20 25 mA 18 V 12.5 15.5 mA 5.2 6.6 mA 5.2 6.6 mA 11.5 14.3 mA 11.5 14.3 mA 10 12.8 mA 0 85 °C Rev. 0 \| Page 5 of 16 5 Page ADSY8401 APPLICATIONS The ADSY8401 is designed as part of a DecDriver® based LCD driver platform. The level shifters provide an interface between the image processor and a timing loop, operating at 3.3 V, and the LCD with high voltage timing input levels. The edge detecting level shifter provides an interface between the LCD monitor output at high voltage and a timing loop such as the AD8389 at 3.3 V. Low offset buffers, AMP and MUX, are capable of driving high capacitive loads such as VCOM and NRS without additional buffering. The high current buffer BFR is capable of 100 mA output current, providing high slew rates into large capacitive loads, which are often required for the precharge input, NRS of LCDs. AMP CHANNEL The AMP channel is a low offset unity gain buffer designed to drive a wide range of capacitive loads with a clean settling response. In LCD panel applications, it is most frequently used as a VCOM buffer. MUX CHANNEL The MUX channel is a 2-input, buffered analog multiplexer. The overall performance of its buffered output is very similar to that of the AMP channel. It is ideally suited for driving a wide range of capacitive loads, from very small up to several nF. DRIVING NRS Analog voltage switching capability is provided by the MUX channel. To achieve rapid settling while driving the capacitive NRS input, the output of the MUX is buffered by the high current drive BFR channel. BFR CHANNEL The BFR channel comprises a high output current buffer. It can be used to increase the output drive capability of either the AMP or MUX channels. The BFR channel is most often used in series with the MUX channel output to realize a high current drive NRS switch. GROUNDED OUTPUT MODE In certain designs it is desirable to pull the amplifier and buffer outputs to near ground during power-down. When the voltage on the GSW pin is tied to DGND, the AMPO, MUXO, and BFRO outputs are pulled to near AGND. When the GSW input is left unconnected or tied to DVCC, all outputs operate normally. The level shifters are not affected by the GSW input. DRIVING VCOM The AMP channel comprises a low offset, unity gain buffer. It can be used to drive a large capacitive load, such as VCOM, directly with low overshoot. In certain systems, it might be desirable for a single ADSY8401 to drive the VCOM inputs of more than one LCD panel. In such cases, the MUX channel can be used to drive VCOM directly. The MUX’s switching function is not used, and its output is tied directly to VCOM without the use of the BFR channel. Offset errors and pulse response are the same as that of the AMP channel. www.DataSheet4U.com IMAGE PROCESSOR 10/12 REFERENCE VOLTAGES AD8381/AD8382/AD8383 VRH, VRL, V1, V2 DB(0:9/11) STSQ, XFR, CLK, R/L, INV VID(0:6) 6 LCD DY, DIRY, NRG DIRX, CLX,CLY 1/3 AD8389 ENBX(1–4)xO DXI, CLXI, DXxO ENBX(1–4)I CLXxO CLK MONITxI VCOM NRS1 NRS2 INV ADSY8401 DI1–DI8 DO1–DO4 DO5–DO8 DI9–DI11 DTCTO AMPI BFRI MUXA MUXB SEL DO9T–DO11T, DO9C–DO11C DTCTI AMPO BFRO MUXO ENBX(1–4) DX, DY, DIRY, NRG CLX, CLXN CLY, CLYN DIRX MONITOR VCOM NRS Figure 10. Typical Application—One ADSY8401 per Color Rev. 0 \| Page 11 of 16 11 Page

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