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PDF TC7MP01FK Data sheet ( Hoja de datos )

Número de pieza TC7MP01FK
Descripción Low-Voltage Triple Gate
Fabricantes Toshiba Semiconductor 
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No Preview Available ! TC7MP01FK Hoja de datos, Descripción, Manual

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MP01FK
TC7MP01FK
Low-Voltage Triple Gate(6-input AND + 4-input OR + inverter)
The TC7MP01FK is a high-performance CMOS triple gate
(6-input AND + 4-input OR + inverter). Desinged for use in
1.8 V, 2.5 V, or 3.3 V systems, it achieves high-speed operation
while maintaining the CMOS low power dissipation.
It is also designed with overvoltage tolerant inputs and outputs
up to 3.6V.
All inputs are equipped with protection circuits against static
discharge.
Weight : 0.03 g (typ.)
Features
Low-voltage operation : VCC = 1.65 to 3.6V
Quiescent supply current : ICC = 2μA(max)(Vcc=3.6V)
High-speed operation
: 6 input AND
tpd=3.7ns(max)(Vcc=3.3±0.3V)
tpd=5.5ns(max)(Vcc=2.5±0.2V)
tpd=11.0ns(max)(Vcc=1.8±0.15V)
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4 input OR
tpd=3.5ns(max)(Vcc=3.3±0.3V)
tpd=5.0ns(max)(Vcc=2.5±0.2V)
tpd=10.0ns(max)(Vcc=1.8±0.15V)
INV.
tpd=3.8ns(max)(Vcc=3.3±0.3V)
tpd=5.2ns(max)(Vcc=2.5±0.2V)
tpd=9.5ns(max)(Vcc=1.8±0.15V)
Output current
: IOH/IOL=±12mA(min)(Vcc=3.0V)
: IOH/IOL=±9mA(min)(Vcc=2.3V)
: IOH/IOL=±2mA(min)(Vcc=1.65V)
Latch-up performance : ±300mA
ESD performance
: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
Ultra-small package
: VSSOP(US16)
Power-down protection provided on all inputs and outputs.
1 2007-10-19

1 page




TC7MP01FK pdf
DC Characteristics (Ta=-40 to 85, 1.65VVcc<2.3V)
TC7MP01FK
Characteristics
Input voltage
H-Level
L-Level
Output voltage
H-Level
L-Level
Input leakage current
Power-off leakage current
Quiescent supply current
Symbol
VIH
VIL
V0H
V0L
IIN
IOFF
ICC
Test condition
-
-
VIN=
VIH orVIL
IOH=-100uA
IOH=-2mA
VIN=
VIH orVIL
IOL=2mA
VIN=0 to 3.6V
VIN,VOUT=0 to 3.6V
VIN=VCC or GND
Vcc(V)
1.65 to 2.3
1.65 to 2.3
1.65
1.65
1.65
1.65
0
1.65
Min
0.7×Vcc
-
Vcc-0.2
1.3
-
-
-
-
Max
-
0.13×Vcc
-
-
0.2
±2.0
2.0
2.0
Unit
V
V
μA
μA
μA
AC Characteristics (Ta=-40 to 85,Input: tr=tf=2.0ns, CL=30pF, RL=500Ω)
Characteristics
Symbol
Test condition
Vcc(V)
Propagation delay time
www.DataSheet4UO.cuotpmut to output skew
tpLH
tpHL
tosLH
tosHL
6 input AND
4 input OR
INV.
Figure 1,
Figure 2
(Note)
1.8±0.15
2.5±0.2
3.3±0.3
1.8±0.15
2.5±0.2
3.3±0.3
1.8±0.15
2.5±0.2
3.3±0.3
1.8±0.15
2.5±0.2
3.3±0.3
For CL=50pF, add approximately 300ps to the AC maximum specification.
Note: Parameter guaranteed by design.
(tosLH=|tpLHm-tpLHn|, tosHL=|tpHLm-tpHLn|)
Min
1.0
0.8
0.6
1.0
0.8
0.6
1.0
0.8
0.6
-
-
-
Max
11.0
5.5
3.7
10.0
5.0
3.5
9.5
5.2
3.8
0.5
0.5
0.5
Unit
ns
ns
5 2007-10-19

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