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PESD5V0F1BL Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PESD5V0F1BL
Beschreibung Femtofarad bidirectional ESD protection diode
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 10 Seiten
PESD5V0F1BL Datasheet, Funktion
PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
Rev. 01 — 1 October 2009
Product data sheet
1. Product profile
1.1 General description
Femtofarad bidirectional ElectroStatic Discharge (ESD) protection diode in a leadless
ultra small SOD882 Surface-Mounted Device (SMD) plastic package designed to protect
one signal line from the damage caused by ESD and other transients. The combination of
extremely low capacitance, high ESD maximum rating and ultra small package makes the
device ideal for high-speed data line protection and antenna protection applications.
1.2 Features
I Bidirectional ESD protection of one line I ESD protection up to 10 kV
I Femtofarad capacitance: Cd = 400 fF
I Low ESD clamping voltage: 30 V
I IEC 61000-4-2; level 4 (ESD)
I AEC-Q101 qualified
at 30 ns and ± 8 kV
I Very low leakage current: IRM < 1 nA
1.3 Applications
www.DataSheet4U.com
I 10/100/1000 Mbit/s Ethernet
I FireWire
I High-speed data lines
I Subscriber Identity Module (SIM) card
protection
I Cellular handsets and accessories
I Portable electronics
I Communication systems
I Computers and peripherals
I Audio and video equipment
I Antenna protection
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Per device
VRWM
Cd
reverse standoff voltage
diode capacitance
Conditions
f = 1 MHz; VR = 0 V
Min Typ Max
- - 5.5
- 0.4 0.55
Unit
V
pF






PESD5V0F1BL Datasheet, Funktion
NXP Semiconductors
PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
7. Application information
PESD5V0F1BL is designed for the protection of one bidirectional data or signal line from
the damage caused by ESD and surge pulses. The device may be used on lines where
the signal polarities are both, positive and negative with respect to ground.
ANTENNA
GPS
PESD5V0F1BL
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GND
006aab600
Fig 6. Application diagram
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
8. Test information
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
PESD5V0F1BL_1
Product data sheet
Rev. 01 — 1 October 2009
© NXP B.V. 2009. All rights reserved.
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