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PDF WV3HG2128M72EEU-AD4 Data sheet ( Hoja de datos )
| Número de pieza | WV3HG2128M72EEU-AD4 | |
| Descripción | 2GB - 2x128Mx72 DDR2 SDRAM UNBUFFERED | |
| Fabricantes | White Electronic Designs | |
| Logotipo |  |
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White Electronic Designs WV3HG2128M72EEU-AD4
ADVANCED*
2GB – 2x128Mx72 DDR2 SDRAM UNBUFFERED, ECC w/PLL
FEATURES
200-pin, dual in-line memory module (SO-DIMM)
Support ECC error detection and correction
Fast data transfer rates: PC2-6400*, PC2-5300*,
PC2-4200 and PC2-3200
VCC = VCCQ = 1.8V ±0.1V
1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
Differential clock inputs (CK, CK#)
Multiple internal device banks for concurrent
operation
Programmable CAS# latency (CL): 3, 4, 5 and 6
Adjustable data-output drive strength
On-die termination (ODT)
Posted CAS# latency: 0, 1, 2, 3 and 4
Serial Presence Detect (SPD) with EEPROM
64ms: 8,192 cycle refresh
Gold edge contacts
Dual Rank
RoHS compliant
Package option
www•.Da2t0a0ShPeinet4SUO.c-oDmIMM
• PCB – 30.00mm (1.181") Max
DESCRIPTION
The WV3HG2128M72EEU is a 2x128Mx72 Double Data
Rate DDR2 SDRAM high density module. This memory
module consists of eighteen 128Mx8 bit stacked BGA with
8 banks DDR2 Synchronous DRAMs in FBGA packages,
mounted on a 200-pin SO-DIMM FR4 substrate.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
NOTE: Consult factory for availability of:
• Vendor source control options
• Industrial temperature option
Clock Speed
CL-tRCD-tRP
OPERATING FREQUENCIES
PC2-6400*
400MHz
6-6-6
PC2-5300*
333MHz
5-5-5
PC2-4200
266MHz
4-4-4
PC2-3200
200MHz
3-3-3
February 2006
Rev. 0
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs WV3HG2128M72EEU-AD4
ADVANCED
OPERATING TEMPERATURE CONDITION
Parameter
Symbol
Rating
Units
Operating temperature
TOPER
0° to 85°
°C
Notes:
1. Operating temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JEDED JESD51.2
2. At 0°C - 85°C, operation temperature range, all DRAM specification will be supported.
Notes
1, 2
Parameter
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
INPUT DC LOGIC LEVEL
All voltages referenced to VSS
Symbol
VIH(DC)
VIL(DC)
Min
VREF + 0.125
-0.300
Max
VCC + 0.300
VREF - 0.125
Units
V
V
Parameter
Input High (Logic 1) Voltage DDR2-400 & DDR2-533
Input Low (Logic 1) Voltage DDR2-667
Input Low (Logic 0) Voltage DDR2-400 & DDR2-533
Input Low (Logic 0) Voltage DDR2-667
INPUT AC LOGIC LEVEL
All voltages referenced to VSS
Symbol
VIH(AC)
VIH(AC)
VIL(AC)
VIL(AC)
www.DataSheet4U.com
Min
VREF + 0.250
VREF + 0.200
-
-
Max
-
-
VREF - 0.250
VREF - 0.200
Units
V
V
V
V
INPUT/OUTPUT CAPACITANCE
TA = 25°C, f = 100MHz
Parameter
Input Capacitance (A0~A13, BA0~BA2, RAS#, CAS#, WE#)
Input Capacitance (CKE0, CKE1), (ODT0, ODT1)
Input Capacitance (CS0# ~ CS1#)
Input Capacitance (CK, CK#)
Input Capacitance (DM0 ~ DM8), (DQS0 ~ DQS8)
Input Capacitance (DQ0 ~ DQ63), (CB0 ~ CB7)
Symbol
CIN1
CIN2
CIN3
CIN4
CIN5 (665)
CIN5 (534, 403)
COUT1 (665)
COUT1 (534, 403)
Min
22
13
13
6
9
9
9
9
Max Units
40 pF
22 pF
22 pF
7 pF
11 pF
12 pF
11 pF
12 pF
February 2006
Rev. 0
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
5 Page 
White Electronic Designs WV3HG2128M72EEU-AD4
ADVANCED
Document Title
2GB – 2x128Mx72 DDR2 SDRAM UNBUFFERED, ECC w/PLL
Revision History
Rev #
Rev 0
History
Created
Release Date Status
February 2006
Advanced
www.DataSheet4U.com
February 2006
Rev. 0
11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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