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P89LPC9103 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer P89LPC9103
Beschreibung (P89LPC9102 - P89LPC9107) 8-bit microcontrollers
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
P89LPC9103 Datasheet, Funktion
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
1 kB 3 V byte-erasable Flash with 8-bit A/D converter
Rev. 02 — 11 April 2005
Product data sheet
1. General description
The P89LPC9102/9103/9107 are single-chip microcontrollers in low-cost 10-pin and
14-pin packages based on a high performance processor architecture that executes
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many
system-level functions have been incorporated into the P89LPC9102/9103/9107 in order
to reduce component count, board space, and system cost.
2. Features
2.1 Principal features
www.DataSheet4U.com
s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
s 128-byte RAM data memory.
s Two 16-bit timer/counters (P89LPC9102/9107). Two 16-bit timers (P89LPC9103)
s 23-bit system timer that can also be used as a RTC.
s Four input multiplexed 8-bit A/D converter/single DAC output. One analog comparator
with selectable reference.
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities
(P89LPC9103/9107).
s High-accuracy internal RC oscillator option, factory calibrated to 1 %, allows operation
without external oscillator components. The RC oscillator option is selectable and fine
tunable.
s VDD operating range of 2.4 V to 3.6 V with 5 V tolerant I/O pins (may be pulled up or
driven to 5.5 V).
s Up to 10 (P89LPC9107) or eight (P89LPC9102/9103) I/O pins when using internal
oscillator and reset options.
s Ultra-small 10-pin HVSON package (P89LPC9102/9103). 14-pin TSSOP
(P89LPC9107).
2.2 Additional features
s A high performance 80C51 CPU provides instruction cycle times of 136 ns to 272 ns
for all instructions except multiply and divide when using the internal 7.3728 MHz RC
oscillator in clock doubling mode (111 ns to 222 ns when using an external 18 MHz
clock). A lower clock frequency for the same performance results in power savings and
reduced EMI.






P89LPC9103 Datasheet, Funktion
Philips Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
P1[0:2], P1.5
P0[1:5], P0.7
KBI1
KBI2
P89LPC9107
ACCELERATED 2-CLOCK 80C51 CPU
1 kB
FLASH
internal bus
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
UART
128 BYTE
RAM
ADC1/DAC1
KEYPAD
INTERRUPT
WATCHDOG TIMER
AND OSCILLATOR
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
clock
REAL-TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
ANALOG
COMPARATORS
TXD
RXD
AD10
AD11
AD12
AD13
DAC1
T0
T1
CIN1A
CIN1B
CLKOUT
CLKIN
CONFIGURABLE
OSCILLATOR
Fig 3. Block diagram of P89LPC9107.
ON-CHIP
RC OSCILLATOR
WITH CLOCK
DOUBLER OPTION
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
002aab100
6. Functional diagram
www.DataSheet4U.com
VDD VSS
DAC1
AD13
CLKIN
AD11
AD12
AD10
CLKOUT
CIN1A
CMPREF
KBI2
CIN1B
KBI1
T1
PORT 0
Fig 4. Functional diagram of P89LPC9102.
P89LPC9102
PORT 1
002aaa971
RST
T0
9397 750 14655
Product data sheet
Rev. 02 — 11 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
6 of 58

6 Page









P89LPC9103 pdf, datenblatt
Philips Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
Table 5: P89LPC9103 pin description …continued
Symbol
Pin Type Description
P1.5/RST
2
I
P1.5 — Port 1 bit 5 (input-only).
I RST — External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until VDD has reached its specified level.
When system power is removed VDD will fall below the minimum specified
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when VDD falls below the minimum specified operating voltage.
VSS
3I
Ground: 0 V reference.
VDD
7I
Power supply: This is the power supply voltage for normal operation as well as Idle
mode and Power-down mode.
Table 6: P89LPC9107 pin description
Symbol
Pin Type Description
P0.1 to P0.5,
P0.7
I/O Port 0: Port 0 is an I/O port with a user-configurable output type. During reset Port 0
latches are configured in the input-only mode with the internal pull-up disabled. The
operation of Port 0 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to Section 8.12.1 “Port
configurations” and Table 12 “Static characteristics” for details.
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
P0.1/KBI1/
AD10
5
I/O P0.1 — Port 0 bit 1.
I KBI1 — Keyboard input 1.
www.DPa0ta.S2h/KeBetI42U/ .com 1
AD11
I AD10 — ADC1 channel 0 analog input.
I/O P0.2 — Port 0 bit 2.
I KBI2 — Keyboard input 2.
I AD11 — ADC1 channel 1 analog input.
P0.3/CIN1B/
AD12
14
I/O P0.3 — Port 0 bit 3.
I CIN1B — Comparator 1 positive input.
I AD12 — ADC1 channel 2 analog input.
P0.4/CIN1A/
AD13/DAC1
12
I/O P0.4 — Port 0 bit 4.
I CIN1A — Comparator 1 positive input.
I AD13 — ADC1 channel 3 analog input.
O DAC1 — Digital to analog converter output.
P0.5/CMPREF/ 11
CLKIN
I/O P0.5 — Port 0 bit 5.
I CMPREF — Comparator reference (negative) input.
I CLKIN — External clock input.
P0.7/T1/ 8 I/O P0.7 — Port 0 bit 7.
CLKOUT
I/O T1 — Timer/counter 1 external count input or overflow/PWM output.
I CLKOUT — Clock output.
9397 750 14655
Product data sheet
Rev. 02 — 11 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
12 of 58

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