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PDF AGR09180EF Data sheet ( Hoja de datos )
| Número de pieza | AGR09180EF | |
| Descripción | Lateral MOSFET | |
| Fabricantes | TriQuint Semiconductor | |
| Logotipo |  |
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AGR09180EF
180 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Introduction
The AGR09180EF is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
(LDMOS) RF power transistor suitable for cellular
band, code-division multiple access (CDMA), global
system for mobile communication (GSM), enhanced
data for global evolution (EDGE), and time-division
multiple access (TDMA) single and multicarrier class
AB wireless base station amplifier applications. This
device is manufactured on an advanced LDMOS
technology, offering state-of-the-art performance,
reliability, and thermal resistance. Packaged in an
industry-standard CuW package capable of deliver-
ing a minimum output power of 180 W, it is ideally
suited for today's RF power amplifier applications.
Figure 1. AGR09180EF (flanged) Package
www.DataSheet4U.com
Features
Typical performance ratings are for IS-95 CDMA,
pilot, sync, paging, traffic codes 8—13:
— Output power (POUT): 38 W.
— Power gain: 18.25 dB.
— Efficiency: 27%.
— Adjacent channel power ratio (ACPR) for
30 kHz bandwidth (BW):
(750 kHz offset: –45 dBc)
(1.98 MHz offset: –60 dBc).
— Input return loss: 10 dB.
High-reliability, gold-metalization process.
High gain, efficiency, and linearity.
Integrated ESD protection.
Si LDMOS.
Industry-standard packages.
180 W minimum output power.
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case
Sym
R JC
Value
0.35
Unit
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Sym Value Unit
Drain-source Voltage
VDSS 65
Vdc
Gate-source Voltage
VGS –0.5, +15 Vdc
Total Dissipation at TC = 25 °C PD 500 W
Derate Above 25 ˇC
— 2.86 W/°C
Operating Junction Tempera- TJ
200 °C
ture
Storage Temperature Range TSTG –65, +150 °C
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
AGR09180EF
HBM
MM
CDM
Minimum (V)
500
50
1000
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
tdaukreinngtoalal hvoainddelinxpgo, sausrseemtobElyS, Danadntdesetleocpterircaatlioonvse.rPAstEgreeAsrKes D(EeOvSic)es
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
1 page  
AGR09180EF
180 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics (continued)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
3
ACP+
ACP-
ACP1+
ACP1-
8 13 18 23 28 33 38 43 48 53 58 63 68 73 78 83
POUT (W)ZZ
Test Conditions:
VDD = 28 Vdc, IDQ = 1700 mA, TC = 30 °C, IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8—13,
FREQUENCY = 880 MHz, OFFSET 1 = 750 kHz, 30 kHz BW, OFFSET 2 = 1.98 MHz, 30 kHz BW.
Figure 4. ACPR vs. POUT
20 0.0
19
POUT = 38 W
-2.0
www.DataSheet4U.com18
17
16
POWER GAIN
POUT = 220 W
-4.0
-6.0
-8.0
15 -10.0
14 -12.0
13 -14.0
12 RETURN LOSS
11
-16.0
-18.0
10 -20.0
860 865 870 875 880 885 890 895 900
FREQUENCY (MHz)Z
Test Conditions:
VDD = 28 Vdc, IDQ = 1700 mA, TC = 30 °C, WAVEFORM = CW.
Figure 5. Power Gain and Return Loss vs. Frequency
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