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PDF ADC12V170 Data sheet ( Hoja de datos )
| Número de pieza | ADC12V170 | |
| Descripción | 1.1 GHz Bandwidth A/D Converter | |
| Fabricantes | National Semiconductor | |
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ADC12V170
April 27, 2009
12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with
LVDS Outputs
General Description
The ADC12V170 is a high-performance CMOS analog-to-
digital converter with LVDS outputs. It is capable of converting
analog input signals into 12-Bit digital words at rates up to 170
Mega Samples Per Second (MSPS). Data leaves the chip in
a DDR (Dual Data Rate) format; this allows both edges of the
output clock to be utilized while achieving a smaller package
size. This converter uses a differential, pipelined architecture
with digital error correction and an on-chip sample-and-hold
circuit to minimize power consumption and the external com-
ponent count, while providing excellent dynamic perfor-
mance. A unique sample-and-hold stage yields a full-power
bandwidth of 1.1 GHz. The ADC12V170 operates from dual
+3.3V and +1.8V power supplies and consumes 781 mW of
power at 170 MSPS.
The separate +1.8V supply for the digital output interface al-
lows lower power operation with reduced noise. A power-
down feature reduces the power consumption to 15 mW while
still allowing fast wake-up time to full operation. In addition
there is a sleep feature which consumes 50 mW of power and
has a faster wake-up time.
The differential inputs provide a full scale differential input
swing equal to 2 times the reference voltage. A stable 1.0V
internal voltage reference is provided, or the ADC12V170 can
be operated with an external reference.
Clock mode (differential versus single-ended) and output data
format (offset binary versus 2's complement) are pin-se-
lectable. A duty cycle stabilizer maintains performance over
a wide range of input clock duty cycles.
The ADC12V170 is pin-compatible with the ADC14V155. It is
available in a 48-lead LLP package and operates over the
industrial temperature range of −40°C to +85°C.
Features
■ 1.1 GHz Full Power Bandwidth
■ Internal sample-and-hold circuit
■ Internal precision 1.0V reference
■ Single-ended or Differential clock modes
■ Clock Duty Cycle Stabilizer
■ Dual +3.3V and +1.8V supply operation
■ Power-down and Sleep modes
■ Offset binary or 2's complement output data format
■ LVDS outputs
■ Pin-compatible: ADC14V155
■ 48-pin LLP package, (7x7x0.8mm, 0.5mm pin-pitch)
Key Specifications
■ Resolution
■ Conversion Rate
■ SNR (fIN = 70 MHz)
■ SFDR (fIN = 70 MHz)
■ ENOB (fIN = 70 MHz)
■ Full Power Bandwidth
■ Power Consumption
12 Bits
170 MSPS
67.2 dBFS (typ)
85.8 dBFS (typ)
10.9 bits (typ)
1.1 GHz (typ)
781 mW (typ)
Applications
■ High IF Sampling Receivers
■ Wireless Base Station Receivers
■ Power Amplifier Linearization
■ Multi-carrier, Multi-mode Receivers
■ Test and Measurement Equipment
■ Communications Instrumentation
■ Radar Systems
Block Diagram
© 2009 National Semiconductor Corporation 300168
30016802
www.national.com
1 page  
wwAwb.DsatoaSlhueette4UM.coamximum Ratings
(Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VA, VD)
Supply Voltage (VDR)
|VA–VD|
−0.3V to 4.2V
−0.3V to 2.35V
≤ 100 mV
Voltage on Any Input Pin
(Not to exceed 4.2V)
−0.3V to (VA +0.3V)
Voltage on Any Output Pin
(Not to exceed 2.35V)
-0.3V to (VDR +0.2V)
Input Current at Any Pin other
than Supply Pins (Note 3)
±5 mA
Package Input Current (Note 3)
±50 mA
Max Junction Temp (TJ)
Thermal Resistance (θJA)
Package Dissipation at TA =
25°C (Note 4)
+150°C
24°C/W
5.2W
ESD Rating
Human Body Model (Note 5)
2000 V
Machine Model (Note 5)
200 V
Charge Device Model
1000 V
Storage Temperature
−65°C to +150°C
Soldering process must comply with National
Semiconductor's Reflow Temperature Profile
specifications. Refer to www.national.com/packaging.
(Note 6)
Operating Ratings (Notes 1, 2)
Operating Temperature
Supply Voltage (VA, VD)
Output Driver Supply (VDR)
Clock Inputs (CLK+, CLK-)
Clock Duty Cycle
Analog Input Pins (VIN+, VIN-)
Analog Input Common Mode (VCM)
|AGND-DGND|
−40°C ≤ TA ≤ +85°C
+3.0V to +3.6V
+1.6V to +2.0V
−0.05V to (VA + 0.05V)
30/70 %
0V to 2.6V
1.4V to 1.6V
≤100mV
5 www.national.com
5 Page 
wwTwi.mDatianShgeeDt4Uia.cgomram
Transfer Characteristic
Output Timing
30016820
FIGURE 1. Transfer Characteristic (Offset Binary Format)
11
30016810
www.national.com
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADC12V170.PDF ] | |
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