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PDF AD5732R Data sheet ( Hoja de datos )
| Número de pieza | AD5732R | |
| Descripción | (AD57x2R) Voltage Output DACs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Preliminary Technical Data
Complete, Dual, 12-/14-/16-Bit, Serial Input,
Unipolar/Bipolar, Voltage Output DACs
AD5722R/AD5732R/AD5752R
FEATURES
Complete, dual, 12-/14-/16-bit D/A converter
Operates from single/dual supplies
Software programmable output range
+5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V
INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum
Total unadjusted error (TUE): 0.1% FSR maximum
Settling time: 10 µs maximum
Integrated reference: 5 ppm/°C typ.
Integrated reference buffers
Output control during power-up/brownout
Simultaneous updating via LDAC
Asynchronous CLR to zero-/mid-scale
DSP-/microcontroller-compatible serial interface
24-lead TSSOP
Operating temperature range: −40°C to +85°C
iCMOS™ process technology1
APPLICATIONS
Industrial automation
Closed-loop servo control, process control
Automotive test and measurement
Programmable logic controllers
GENERAL DESCRIPTION
The AD5722R/AD5732R/AD5752R are dual, 12-/14-/16-bit,
serial input, voltage output, digital-to-analog converters. They
operate from single supply voltages of +4.5 V up to +16.5 V or
dual supply voltages from ±4.5 V up to ±16.5 V. Nominal full-
scale output range is software-selectable from the options of
+5 V, +10 V, +10.8 V, ±5 V, ±10 V, or ±10.8 V. Integrated output
amplifiers, reference buffers, and proprietary power-up/power-
down control circuitry are also provided.
The parts offer guaranteed monotonicity, integral nonlinearity
(INL) of ±16 LSB maximum, low noise, 10 µs maximum settling
time, and an on-chip +2.5 V reference.
The AD5722R/AD5732R/AD5752R use a serial interface that
operates at clock rates up to 30 MHz and are compatible with
DSP and microcontroller interface standards. Double buffering
allows the simultaneous updating of all DACs. The input coding
is user-selectable twos complement or offset binary for a bipolar
output (depending on the state of pin BIN/2sComp), and
straight binary for a unipolar output. The asynchronous clear
function clears all DAC registers to a user-selectable zero-scale
or mid-scale output. The parts are available in a 24-lead TSSOP
and offer guaranteed specifications over the −40°C to +85°C
industrial temperature range.
Table 1. Pin Compatible Devices
Part Number
Description
AD5722/AD5732/AD5752
AD5722R/AD5732R/AD5752R
without internal reference.
AD5724/AD5734/AD5754
Complete, quad, 12-/14-/16-bit,
serial input, unipolar/bipolar,
voltage output DAC.
AD5724R/AD5734R/AD5754R AD5724/AD5734/AD5754 with
internal reference.
1 For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher-voltage levels, iCMOS is a technology
platform that enables the development of analog ICs capable of 30 V and operating at ±15 V supplies while allowing dramatic reductions in power consumption and
package size, and increased AC and DC performance.
Rev. PrC
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
1 page  
Preliminarywww.DataSheet4U.com Technical Data
AD5722R/AD5732R/AD5752R
Parameter
OUTPUT CHARACTERISTICS2
Output Voltage Range
Headroom
Output Voltage TC
Output Voltage Drift vs. Time
Short-Circuit Current
Load
Capacitive Load Stability
DC Output Impedance
DIGITAL INPUTS2
VIH, Input High Voltage
VIL, Input Low Voltage
Input Current
Pin Capacitance
DIGITAL OUTPUTS (SDO) 2
VOL, Output Low Voltage
VOH, Output High Voltage
VOL, Output Low Voltage
VOH, Output High Voltage
High Impedance Leakage
Current
High Impedance Output
Capacitance
POWER REQUIREMENTS
AVDD
AVSS
DVCC
Power Supply Sensitivity2
∆VOUT/∆ΑVDD
AIDD
AISS
DICC
Power Dissipation
Power-Down Currents
AIDD
AISS
DICC
Value
±10.8
±12
0.9
0.5
±8
±12
±15
20
2
4000
0.5
2
0.8
±1
10
0.4
DVCC − 1
0.4
DVCC − 0.5
±1
5
Unit Test Conditions/Comments
V min to V max
V min to V max
V max
V typ
ppm FSR/°C max
ppm FSR/500 hr
typ
ppm FSR/1000
hr typ
mA max
kΩ min
pF max
Ω typ
V min
V max
µA max
pF typ
AVDD/AVSS = ±11.7 V min , REFIN = +2.5 V
AVDD/AVSS = ±12.9 V min, REFIN = +3 V
For specified performance
DVCC = 2.7 V to 5.5 V, JEDEC compliant
Per pin
Per pin
V max
V min
V max
V min
µA max
pF typ
DVCC = 5 V ± 10%, sinking 200 µA
DVCC = 5 V ± 10%, sourcing 200 µA
DVCC = 2.7 V to 3.6 V, sinking 200 µA
DVCC = 2.7 V to 3.6 V, sourcing 200 µA
4.5 to 16.5
-4.5 to -16.5
2.7 to 5.5
−75
2
1.5
1
TBD
TBD
TBD
TBD
V min to V max
V min to V max
V min to V max
dB typ
mA/channel
max
mA/channel
max
µA max
mW typ
Outputs unloaded
Outputs unloaded
VIH = DVCC, VIL = GND, 0.5 µA typ
±12 V operation, outputs unloaded
µA typ
µA typ
µA typ
1 For specified performance minimum headroom requirement is 0.9V
2 Guaranteed by characterization. Not production tested.
Rev. PrC | Page 5 of 32
5 Page 
Preliminarywww.DataSheet4U.com Technical Data
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Transient currents of up to 100 mA do not cause SCR latch-up.
Table 6.
Parameter
AVDD to GND
AVSS to GND
DVCC to GND
Digital Inputs to GND
Digital Outputs to GND
REFIN/REFOUT to GND
VOUTA, VOUTB to GND
DAC_GND to GND
SIG_GND to GND
Operating Temperature Range, TA
Industrial
Storage Temperature Range
Junction Temperature, TJ max
24-Lead TSSOP Package
θJA Thermal Impedance
Power Dissipation
Lead Temperature
Soldering
Rating
−0.3 V to +17 V
+0.3 V to −17 V
−0.3 V to +7 V
−0.3 V to DVCC + 0.3 V or 7 V
(whichever is less)
−0.3 V to DVCC + 0.3 V or 7 V
(whichever is less)
−0.3 V to +17 V
AVSS to AVDD
-0.3V to +0.3V
-0.3V to +0.3V
−40°C to +85°C
−65°C to +150°C
105°C
90°C/W
(TJ max – TA)/ θJA
JEDEC Industry Standard
J-STD-020
AD5722R/AD5732R/AD5752R
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. PrC | Page 11 of 32
11 Page | ||
| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet AD5732R.PDF ] | |
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