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AD5734 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5734
Beschreibung (AD57x4) Unipolar/Bipolar Voltage Output DACs
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
AD5734 Datasheet, Funktion
www.DataSheet4U.com
Complete, Quad, 12-/14-/16-Bit, Serial Input,
Unipolar/Bipolar Voltage Output DACs
AD5724/AD5734/AD5754
FEATURES
Complete, quad, 12-/14-/16-bit digital-to-analog converter
(DAC)
Operates from single/dual supplies
Software programmable output range
+5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V
INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum
Total unadjusted error (TUE): 0.1% FSR maximum
Settling time: 10 μs typical
Integrated reference buffers
Output control during power-up/brownout
Simultaneous updating via LDAC
Asynchronous CLR to zero scale or midscale
DSP-/microcontroller-compatible serial interface
24-lead TSSOP
Operating temperature range: −40°C to +85°C
iCMOS process technology1
APPLICATIONS
Industrial automation
Closed-loop servo control, process control
Automotive test and measurement
Programmable logic controllers
GENERAL DESCRIPTION
The AD5724/AD5734/AD5754 are quad, 12-/14-/16-bit, serial
input, voltage output digital-to-analog converters. They operate
from single-supply voltages from +4.5 V up to +16.5 V or dual-
supply voltages from ±4.5 V up to ±16.5 V. Nominal full-scale
output range is software-selectable from +5 V, +10 V, +10.8 V,
±5 V, ±10 V, or ±10.8 V. Integrated output amplifiers, reference
buffers, and proprietary power-up/power-down control circuitry
are also provided.
The parts offer guaranteed monotonicity, integral nonlinearity
(INL) of ±16 LSB maximum, low noise, and 10 μs maximum
settling time.
The AD5724/AD5734/AD5754 use a serial interface that operates
at clock rates up to 30 MHz and are compatible with DSP and
microcontroller interface standards. Double buffering allows
the simultaneous updating of all DACs. The input coding is
user-selectable twos complement or offset binary for a bipolar
output (depending on the state of Pin BIN/2sComp), and straight
binary for a unipolar output. The asynchronous clear function
clears all DAC registers to a user-selectable zero-scale or midscale
output. The parts are available in a 24-lead TSSOP and offer
guaranteed specifications over the −40°C to +85°C industrial
temperature range.
DVCC
SDIN
SCLK
SYNC
SDO
CLR
BIN/2sCOMP
FUNCTIONAL BLOCK DIAGRAM
AVSS AVDD
REFIN
AD5724/AD5734/AD5754
INPUT SHIFT
REGISTER
AND
CONTROL
LOGIC
n
INPUT
REGISTER A
INPUT
REGISTER B
REFERENCE BUFFERS
DAC
n
REGISTER A
DAC A
DAC
n
REGISTER B
DAC B
INPUT
REGISTER C
DAC
n
REGISTER C
DAC C
INPUT
REGISTER D
DAC
n
REGISTER D
DAC D
VOUTA
VOUTB
VOUTC
VOUTD
AD5724: n = 12-BIT
AD5734: n = 14-BIT
AD5754: n = 16-BIT
GND
LDAC
Figure 1.
DAC_GND (2) SIG_GND (2)
1 For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher-voltage levels, iCMOS® is a technology
platform that enables the development of analog ICs capable of 30 V and operating at ±15 V supplies while allowing dramatic reductions in power consumption and
package size, as well as increased ac and dc performance.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.






AD5734 Datasheet, Funktion
wwAwD.D5at7aS2h4ee/t4AUD.co5m734/AD5754
TIMING DIAGRAMS
SCLK
SYNC
SDIN
LDAC
1
t6
t4
2
t7
DB23
t9
t1
24
t3 t2
t5
t8
DB0
t10
t11
VOUTx
VOUTx
CLR
VOUTx
t12
t13
t14
Figure 2. Serial Interface Timing Diagram
t12
SCLK
SYNC
SDIN
SDO
LDAC
t17
t4
t1
24
t3 t2
t7
D32B
t8
D0B D32B
INPUT WORD FOR DAC N
INPUT WORD FOR DAC N – 1
t16
DB23
UNDEFINED
INPUT WORD FOR DAC N
48
t5
t15
D0B
DB0
t10
t11
Figure 3. Daisy-Chain Timing Diagram
Rev. 0 | Page 6 of 32

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AD5734 pdf, datenblatt
wwAwD.D5at7aS2h4ee/t4AUD.co5m734/AD5754
0.02
0.01
0
–0.01
BIPOLAR 10V MIN
UNIPOLAR 10V MIN
BIPOLAR 10V MAX
UNIPOLAR 10V MAX
–0.02
–0.03
–0.04
11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5
SUPPLY VOLTAGE (V)
Figure 18. AD5754 Total Unadjusted Error vs. Supply Voltage
0.04
0.03
0.02
0.01
0
–0.01
BIPOLAR 5V MIN
UNIPOLAR 5V MIN
BIPOLAR 5V MAX
UNIPOLAR 5V MAX
–0.02
–0.03
–0.04
–0.05
5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
SUPPLY VOLTAGE (V)
Figure 19. AD5754 Total Unadjusted Error vs. Supply Voltage
8
6
IDD (mA)
4
2
0
–2
ISS (mA)
–4
–6
–8
4.5 6.5 8.5 10.5 12.5 14.5 16.5
AVDD/AVSS (V)
Figure 20. Supply Current vs. Supply Voltage (Dual Supply)
10
9
8
7
6
5
4
4.5 6.5 8.5 10.5 12.5 14.5 16.5
AVDD (V)
Figure 21. Supply Current vs. Supply Voltage (Single Supply)
4
+10V
3
2
1
±10V
0
–1
–2
–3
–40
±5V
–20 0
20 40 60
TEMPERATURE (°C)
Figure 22. Zero-Scale Error vs. Temperature
80
0.8
0.6
0.4
±5V RANGE
0.2
0
–0.2
±10V RANGE
–0.4
–0.6
–0.8
–1.0
–40
–20
0
20 40 60
TEMPERATURE (°C)
Figure 23. Bipolar Zero Error vs. Temperature
80
Rev. 0 | Page 12 of 32

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