ADUM3210 Datasheet PDF - Analog Devices
| Part Number | ADUM3210 | |
| Description | Enhanced System-Level ESD Reliability | |
| Manufacturers | Analog Devices | |
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Dual-Channel Digital Isolator,
Enhanced System-Level ESD Reliability
ADuM3210
FEATURES
Enhanced system-level ESD performance per IEC 61000-4-x
High temperature operation: 125°C
Default low output
Narrow body, RoHS-compliant, 8-lead SOIC
Low power operation
5 V operation
1.6 mA per channel maximum @ 0 Mbps to 2 Mbps
3.7 mA per channel maximum @ 10 Mbps
3 V operation
1.4 mA per channel maximum @ 0 Mbps to 2 Mbps
2.4 mA per channel maximum @ 10 Mbps
3 V/5 V level translation
High data rate: dc to 10 Mbps (NRZ)
Precise timing characteristics
3 ns maximum pulse width distortion
3 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Safety and regulatory approvals
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak
APPLICATIONS
Size-critical multichannel isolation
Plasma display panels
GENERAL DESCRIPTION
The ADuM32101 is a dual-channel, digital isolator based on
Analog Devices, Inc., iCoupler® technology. Combining high
speed CMOS and monolithic transformer technology, this
isolation component provides outstanding performance charac-
teristics superior to alternatives such as optocoupler devices.
By avoiding the use of LEDs and photodiodes, iCoupler
devices remove the design difficulties commonly associated
with optocouplers. The typical optocoupler concerns regarding
uncertain current transfer ratios, nonlinear transfer functions,
and temperature and lifetime effects are eliminated with the
simple iCoupler digital interfaces and stable performance charac-
teristics. The need for external drivers and other discrete
components is eliminated with these iCoupler products.
Furthermore, iCoupler devices consume one-tenth to one-
sixth the power of optocouplers at comparable signal data rates.
The ADuM3210 isolator provides two independent isolation
channels. It operates with the supply voltage on either side
ranging from 2.7 V to 5.5 V, providing compatibility with lower
voltage systems as well as enabling voltage translation functionality
across the isolation barrier. The ADuM3210 has a default output
low characteristic in comparison to the ADuM3200/ADuM3201
models that have a default output high characteristic. The
ADuM3210 is also available in 125°C temperature grade.
In comparison to the ADuM1210 isolator, the ADuM3210
isolator contains various circuit and layout changes providing
increased capability relative to system-level IEC 61000-4-x
testing (ESD, burst, and surge). The precise capability in these
tests for either the ADuM1210 or ADuM3210 products is strongly
determined by the design and layout of the user’s board or
module. For more information, see AN-793 Application Note,
ESD/Latch-Up Considerations with iCoupler Isolation Products.
FUNCTIONAL BLOCK DIAGRAM
VDD1 1
ADuM3210
8 VDD2
VIA 2
ENCODE
DECODE
7 VOA
VIB 3
ENCODE
DECODE
6 VOB
GND1 4
5 GND2
Figure 1.
1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,239. Other patents pending.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
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ADuM3210
ELECTRICAL CHARACTERISTICS—3 V, 125°C OPERATION
All voltages are relative to their respective ground. 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications
apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V.
Table 3.
Parameter
DC SPECIFICATIONS
Input Supply Current, per Channel, Quiescent
Output Supply Current, per Channel, Quiescent
ADuM3210TR, Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps
VDD1 Supply Current
VDD2 Supply Current
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
SWITCHING SPECIFICATIONS
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching6
Output Rise/Fall Time (10% to 90%)
Common-Mode Transient Immunity
at Logic High Output7
Common-Mode Transient Immunity
at Logic Low Output7
Refresh Rate
Input Dynamic Supply Current, per Channel8
Output Dynamic Supply Current, per Channel8
Symbol Min
IDDI (Q)
IDDO (Q)
Typ Max
0.3 0.5
0.3 0.5
Unit Test Conditions
mA
mA
IDD1 (Q)
IDD2 (Q)
IDD1 (10)
IDD2 (10)
IIA, IIB
VIH
VIL
VOAH
VOBH
VOAL
VOBL
−10
0.7 × (VDD1
or VDD2)
(VDD1 or
VDD2) − 0.1
(VDD1 or
VDD2) − 0.5
PW
tPHL, tPLH
PWD
10
20
tPSK
tPSKCD
tR/tF
|CMH|
|CML|
fr
IDDI (D)
IDDO (D)
25
25
0.8 1.3
0.7 1.0
2.0
1.1
+0.01
3.2
1.7
+10
0.3 × (VDD1
or VDD2)
3.0
2.8
0.0 0.1
0.04 0.1
0.2 0.4
100
60
3
5
22
3
3.0
35
35
1.1
0.10
0.03
mA DC to 1 MHz logic signal freq.
mA DC to 1 MHz logic signal freq.
mA 5 MHz logic signal freq.
mA 5 MHz logic signal freq.
μA 0 ≤ VIA, VIB, ≤ VDD1 or VDD2
V
V
V IOx = −20 μA, VIx = VIxH
V IOx = −4 mA, VIx = VIxH
V IOx = 20 μA, VIx = VIxL
V IOx = 400 μA, VIx = VIxL
V IOx = 4 mA, VIx = VIxL
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
kV/μs
kV/μs
Mbps
mA/Mbps
mA/Mbps
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
1 The supply current values for both channels are combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 4 through Figure 6 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 7 and Figure 8 for
total VDD1 and VDD2 supply currents as a function of data rate.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on
opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 4 through Figure 6 for
information on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply
current for a given data rate.
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