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ADE7518 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADE7518
Beschreibung Single-Phase Energy Measurement IC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADE7518 Datasheet, Funktion
www.DataSheet4U.com
Single-Phase Energy Measurement IC with
8052 MCU, RTC, and LCD Driver
ADE7518
GENERAL FEATURES
Wide supply voltage operation: 2.4 V to 3.7 V
Internal bipolar switch between regulated and battery inputs
Ultralow power operation with power saving modes
Full operation: 4 mA to 1.6 mA (PLL clock dependent)
Battery mode: 3.2 mA to 400 μA (PLL clock dependent)
Sleep mode
Real-time clock (RTC) mode: 1.5 μA
RTC and LCD mode: 27 μA
Reference: 1.2 V ± 0.1% (10 ppm/°C drift)
64-lead RoHS package option
Low profile quad flat package (LQFP)
Operating temperature range: −40°C to +85°C
ENERGY MEASUREMENT FEATURES
Proprietary analog-to-digital converters (ADCs) and digital
signal processing (DSP) provide high accuracy active
(WATT), reactive (VAR), and apparent energy (VA)
measurement
Less than 0.1% error on active energy over a dynamic
range of 1000 to 1 @ 25°C
Less than 0.5% error on reactive energy over a dynamic
range of 1000 to 1 @ 25°C
Less than 0.5% error on root mean square (rms)
measurements over a dynamic range of 500 to 1 for
current (Irms) and 100 to 1 for voltage (Vrms) @ 25°C
Supports IEC 62053-21, IEC 62053-22, IEC 62053-23,
EN 50470-3 Class A, Class B, and Class C, and ANSI C12-16
Differential input with programmable gain amplifiers (PGAs)
supports shunts and current transformers
High frequency outputs proportional to Irms, active, reactive,
or apparent power (AP)
MICROPROCESSOR FEATURES
8052-based core
Single-cycle 4 MIPS 8052 core
8052-compatible instruction set
32.768 kHz external crystal with on-chip PLL
Two external interrupt sources
External reset pin
Low power battery mode
Wake-up from I/O, alarm, and universal asynchronous
receiver/transmitter (UART)
LCD driver operation
Real-time clock
Counter for seconds, minutes, and hours
Automatic battery switchover for RTC backup
Operation down to 2.4 V
Ultralow battery supply current: 1.5 μA
Selectable output frequency: 1 Hz to 16.384 kHz
Embedded digital crystal frequency compensation for
calibration and temperature variation: 2 ppm resolution
Integrated LCD driver
108-segment driver
2×, 3×, or 4× multiplexing
LCD voltages generated with external resistors
On-chip peripherals
UART, SPI or I2C, and watchdog timer
Power supply management with user-selectable levels
Memory: 16 kB flash memory, 512 bytes RAM
Development tools
Single-pin emulation
IDE-based assembly and C-source debugging
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.






ADE7518 Datasheet, Funktion
ADE7518www.DataSheet4U.com
ANALOG PERIPHERALS
Table 2.
Parameter
POWER-ON RESET (POR)
VDD POR
Detection Threshold
POR Active Timeout Period
VSWOUT POR
Detection Threshold
POR Active Timeout Period
VINTD POR
Detection Threshold
POR Active Timeout Period
VINTA POR
Detection Threshold
POR Active Timeout Period
BATTERY SWITCHOVER
Voltage Operating Range (VSWOUT)
VDD to VBAT Switching
Switching Threshold (VDD)
Switching Delay
VBAT to VDD Switching
Switching Threshold (VDD)
Switching Delay
VSWOUT To VBAT Leakage Current
LCD, RESISTOR LADDER ACTIVE
Leakage Current
V1 Segment Line Voltage
V2 Segment Line Voltage
V3 Segment Line Voltage
ON-CHIP REFERENCE
Reference Error
Power Supply Rejection
Temperature Coefficient
Min Typ Max Unit Test Conditions/Comments
2.5 2.95 V
33 ms
1.8 2.2 V
20 ms
2.03 2.22 V
16 ms
2.05 2.15 V
120 ms
2.4 3.7 V
2.5 2.95 V
10 ns When VDD to VBAT switch activated by VDD
30 ms When VDD to VBAT switch activated by VDCIN
2.5 2.95 V
30 ms Based on VDD > 2.75 V
10 nA VBAT = 0 V, VSWOUT = 3.43 V, TA = 25°C
LCDVA − 0.1
LCDVB − 0.1
LCDVC − 0.1
±20
LCDVA
LCDVB
LCDVC
nA
V
V
V
1/2 and 1/3 bias modes, no load
Current on segment line = −2 μA
Current on segment line = −2 μA
Current on segment line = −2 μA
±0.9
80
10 50
mV
dB
ppm/°C
TA = 25°C
Rev. 0 | Page 6 of 128

6 Page









ADE7518 pdf, datenblatt
ADE7518www.DataSheet4U.com
Table 8. SPI Slave Mode Timing (SPICPHA = 1) Parameters
Parameter
Description
tSS SS to SCLK edge
tSL SCLK low pulse width
tSH SCLK high pulse width
tDAV Data output valid after SCLK edge
tDSU Data input setup time before SCLK edge
tDHD Data input hold time after SCLK edge
tDF Data output fall time
tDR Data output rise time
tSR SCLK rise time
tSF SCLK fall time
tSFS SS high after SCLK edge
Min
145
6 × tCORE1
6 × tCORE1
0
2 × tCORE1 + 0.5
0
1 tCORE depends on the clock divider or CD[2:0] bits of the POWCON SFR (see Table 24); tCORE = 2CD/4.096 MHz.
SS
SCLK
(SPICPOL = 0)
SCLK
(SPICPOL = 1)
tSS
tSH
tSL
tSR
Typ Max
25
19
19
19
19
tSFS
tSF
Unit
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
MISO
MOSI
tDAV
tDF
MSB
tDR
BITS [6:1]
MSB IN
BITS [6:1]
tDSU
tDHD
Figure 6. SPI Slave Mode Timing (SPICPHA = 1)
LSB
LSB IN
Rev. 0 | Page 12 of 128

12 Page





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