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PCA9626 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCA9626
Beschreibung 24-bit Fm+ I2C-bus 100 MA 40V LED Driver
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
PCA9626 Datasheet, Funktion
www.DataSheet4U.com
PCA9626
24-bit Fm+ I2C-bus 100 mA 40 V LED driver
Rev. 01 — 2 June 2009
Product data sheet
1. General description
The PCA9626 is an I2C-bus controlled 24-bit LED driver optimized for voltage switch
dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LED output
has its own 8-bit resolution (256 steps) fixed frequency individual PWM controller that
operates at 97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the
LED to be set to a specific brightness value. An additional 8-bit resolution (256 steps)
group PWM controller has both a fixed frequency of 190 Hz and an adjustable frequency
between 24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 %
to 99.6 % that is used to either dim or blink all LEDs with the same value.
Each LED output can be off, on (no PWM control), set at its individual PWM controller
value or at both individual and group PWM controller values. The PCA9626 operates with
a supply voltage range of 2.3 V to 5.5 V and the 100 mA open-drain outputs allow
voltages up to 40 V.
The PCA9626 is one of the first LED controller devices in a new Fast-mode Plus (Fm+)
family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated bus
operation (up to 4000 pF).
The active LOW Output Enable input pin (OE) blinks all the LED outputs and can be used
to externally PWM the outputs, which is useful when multiple devices need to be dimmed
or blinked together without using software control.
Software programmable LED Group and three Sub Call I2C-bus addresses allow all or
defined groups of PCA9626 devices to respond to a common I2C-bus address, allowing
for example, all red LEDs to be turned on or off at the same time or marquee chasing
effect, thus minimizing I2C-bus commands. Seven hardware address pins allow up to
126 devices on the same bus.
The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9626
through the I2C-bus, identical to the Power-On Reset (POR) that initializes the registers to
their default state causing the output NAND FETs to be OFF (LED off). This allows an
easy and quick way to reconfigure all device registers to the same condition.
In addition to these features found in PCA9633, PCA9634, PCA9635, PCA9622 and
PCA9624, a new feature to control LED output pattern is incorporated in the PCA9626. A
new control byte called ‘Chase Byte’ allows enabling or disabling of selective LED outputs
depending on the value of the Chase Byte. This feature greatly reduces the number of
bytes to be sent to the PCA9626 when repetitive patterns need to be displayed as in
creating a marquee chasing effect.
If the PCA9626 on-chip 100 mA NAND FETs do not provide enough current or voltage to
drive the LEDs, then the PCA9635 and the PCA9635 with larger current or higher voltage
external drivers can be used.






PCA9626 Datasheet, Funktion
www.DNatXaSPheSete4Um.coicmonductors
PCA9626
24-bit Fm+ I2C-bus 100 mA 40 V LED driver
6.2 Pin description
Table 2.
Symbol
LED22
LED23
VSS
A0
A1
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
A2
A3
A4
LED8
LED9
LED10
LED11
A5
A6
OE
LED12
LED13
LED14
LED15
LED16
LED17
LED18
LED19
SCL
SDA
VDD
LED20
LED21
Pin description
Pin
43
44
1, 6, 7, 12, 16, 21, 25,
30, 31, 36, 37, 45, 48[1]
46
47
2
3
4
5
8
9
10
11
13
14
15
17
18
19
20
22
23
24
26
27
28
29
32
33
34
35
38
39
40
41
42
Type
O
O
power supply
I
I
O
O
O
O
O
O
O
O
I
I
I
O
O
O
O
I
I
I
O
O
O
O
O
O
O
O
I
I/O
power supply
O
O
Description
LED driver 22
LED driver 23
supply ground
address input 0
address input 1
LED driver 0
LED driver 1
LED driver 2
LED driver 3
LED driver 4
LED driver 5
LED driver 6
LED driver 7
address input 2
address input 3
address input 4
LED driver 8
LED driver 9
LED driver 10
LED driver 11
address input 5
address input 6
active LOW output enable
LED driver 12
LED driver 13
LED driver 14
LED driver 15
LED driver 16
LED driver 17
LED driver 18
LED driver 19
serial clock line
serial data line
supply voltage
LED driver 20
LED driver 21
PCA9626_1
Product data sheet
Rev. 01 — 2 June 2009
© NXP B.V. 2009. All rights reserved.
6 of 42

6 Page









PCA9626 pdf, datenblatt
www.DNatXaSPheSete4Um.coicmonductors
PCA9626
24-bit Fm+ I2C-bus 100 mA 40 V LED driver
7.3.1 Mode register 1, MODE1
Table 5. MODE1 - Mode register 1 (address 00h) bit description
Legend: * default value.
Bit Symbol
Access
Value Description
7 AI2
read only
0
Register Auto-Increment disabled.
1* Register Auto-Increment enabled.
6 AI1
R/W 0* Auto-Increment bit 1 = 0. Auto-increment range as defined in Table 3.
1 Auto-Increment bit 1 = 1. Auto-increment range as defined in Table 3.
5 AI0
R/W 0* Auto-Increment bit 0 = 0. Auto-increment range as defined in Table 3.
1 Auto-Increment bit 0 = 1. Auto-increment range as defined in Table 3.
4 SLEEP R/W
0 Normal mode[1].
1* Low power mode. Oscillator off[2].
3 SUB1
R/W
0* PCA9626 does not respond to I2C-bus subaddress 1.
1 PCA9626 responds to I2C-bus subaddress 1.
2 SUB2
R/W
0* PCA9626 does not respond to I2C-bus subaddress 2.
1 PCA9626 responds to I2C-bus subaddress 2.
1 SUB3
R/W
0* PCA9626 does not respond to I2C-bus subaddress 3.
1 PCA9626 responds to I2C-bus subaddress 3.
0
ALLCALL
R/W
0 PCA9626 does not respond to LED All Call I2C-bus address.
1* PCA9626 responds to LED All Call I2C-bus address.
[1] It takes 500 µs max. for the oscillator to be up and running once SLEEP bit has been set to logic 1. Timings on LEDn outputs are not
guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 µs window.
[2] No blinking or dimming is possible when the oscillator is off.
7.3.2 Mode register 2, MODE2
Table 6. MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit Symbol
Access Value Description
7-
read only 0*
reserved
6-
read only 0*
reserved
5
DMBLNK
R/W
0* group control = dimming.
1 group control = blinking.
4 INVRT
read only 0*
reserved
3 OCH
R/W
0* outputs change on STOP command[1]
1 outputs change on ACK
2-
read only 1*
reserved
1-
read only 0*
reserved
0-
read only 1*
reserved
[1] Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9626. Applicable to registers from
02h (PWM0) to 08h (LEDOUT) only.
PCA9626_1
Product data sheet
Rev. 01 — 2 June 2009
© NXP B.V. 2009. All rights reserved.
12 of 42

12 Page





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