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ADCLK914 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADCLK914
Beschreibung Open-Collector HVDS Clock/Data Buffer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
ADCLK914 Datasheet, Funktion
www.DataSheet4U.com
FEATURES
7.5 GHz operating frequency
160 ps propagation delay
100 ps output rise/fall
110 fs random jitter
On-chip input terminations
Extended industrial temperature range: −40°C to +125°C
3.3 V power supply (VCC − VEE)
APPLICATIONS
Clock and data signal restoration
High speed converter clocking
Broadband communications
Cellular infrastructure
High speed line receivers
ATE and high performance instrumentation
Level shifting
Threshold detection
GENERAL DESCRIPTION
The ADCLK914 is an ultrafast clock/data buffer fabricated on
the Analog Devices, Inc., proprietary, complementary bipolar
(XFCB-3) silicon-germanium (SiGe) process. The ADCLK914
features high voltage differential signaling (HVDS) outputs
suitable for driving the latest Analog Devices high speed digital-
to-analog converters (DACs). The ADCLK914 has a single,
differential open-collector output.
The ADCLK914 buffer operates up to 7.5 GHz with a 160 ps
propagation delay and adds only 110 fs random jitter (RJ).
Ultrafast, SiGe, Open-Collector
HVDS Clock/Data Buffer
ADCLK914
FUNCTIONAL BLOCK DIAGRAM
VREF
VT
D
D
5050
VCC
ADCLK914
Q
Q
5050
VEE
Figure 1.
The input has a center tapped, 100 Ω, on-chip termination
resistor and accepts LVPECL, CML, CMOS, LVTTL, or LVDS
(ac-coupled only). A VREF pin is available for biasing ac-coupled
inputs.
The HVDS output stage is designed to directly drive 1.9 V each
side into 50 Ω terminated to VCC for a total differential output
swing of 3.8 V.
The ADCLK914 is available in a 16-lead LFCSP. It is specified
for operation over the extended industrial temperature range of
−40°C to +125°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.






ADCLK914 Datasheet, Funktion
ADCLK914www.DataSheet4U.com
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
D1
D2
NC 3
NC 4
PIN 1
INDICATOR
ADCLK914
TOP VIEW
(Not to Scale)
12 Q
11 Q
10 NC
9 NC
NC = NO CONNECT
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic Description
1 D Noninverting Input.
2 D Inverting Input.
3, 4, 5, 6, 9, 10 NC
No Connect. No physical connection to the die.
7, 14
8, 13
11
VEE
VCC
Q
Negative Supply Voltage.
Positive Supply Voltage.
Inverting Output.
12 Q Noninverting Output.
15
16
Heat Sink/
Exposed Pad
VREF
VT
NC
Reference Voltage. Reference voltage for biasing ac-coupled inputs.
Center Tap. Center tap of 100 Ω input resistor.
No Connect. The metallic back surface of the package is not electrically connected to any part of the circuit.
It can be left floating for optimal electrical isolation between the package handle and the substrate of the
die. It can also be soldered to ground on the application board if improved thermal and/or mechanical
stability is needed. Exposed metal at the corners of the package is connected to this back surface. Allow
sufficient clearance for vias and other components.
Rev. 0 | Page 6 of 12

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ADCLK914 pdf, datenblatt
ADCLK914www.DataSheet4U.com
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06561-0-7/08(0)
Rev. 0 | Page 12 of 12

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