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DS22EV5110 Schematic ( PDF Datasheet ) - National Semiconductor Corporation

Teilenummer DS22EV5110
Beschreibung HDMI Extended Reach Equalizer
Hersteller National Semiconductor Corporation
Logo National Semiconductor Corporation Logo 




Gesamt 18 Seiten
DS22EV5110 Datasheet, Funktion
www.DataSheet4U.com
DS22EV5110
PRELIMINARY
May 11, 2009
DVI, HDMI Extended Reach Equalizer with Retimer and
Output De-Emphasis
General Description
The DS22EV5110 is a 6.75 Gbps (3 x 2.25 Gbps) extended
reach equalizer optimized for DVI™and HDMI™ cable exten-
sion applications with a high performance re-clocking feature.
It supports 3 Transition Minimized Differential Signaling
(TMDS®) data channels and a single clock channel over
DVI™ v1.0, and HDMI™ v1.3a data rates up to 2.25 Gbps for
each data channel. The device incorporates a configurable
receive equalizer, a clock and data recovery (CDR) circuit and
a de-emphasis driver on each data channel over DVI v1.0,
and HDMI v1.3a data rates up to 2.25 Gbps for each data
channel. The device incorporates a configurable receive
equalizer with a clock and data recovery (CDR) circuit on each
data channel. The clock channel feeds a high-perfromance
phase locked loop (PLL) that regenerates a low jitter output
clock for data recovery, enabling the extended reach of driv-
ing capability feature for repeater application.
The DS22EV5110 equalizes greater than 25 meters 28 AWG
of HDMI cable, enabling 1080p resolution with 12 bit deep
color depth (2.25 Gbps), to a low jitter version of the clock and
data signal outputs, reducing both deterministic and random
jitter. Obtaining total jitter is 0.09 UI or less over the supported
data rates. This extremely low level of output jitter provides
system designers with extra margin and flexibility when work-
ing with stringent timing budgets. It is ideal for the DVI and
HDMI source and repeater applications.
The transmitter supports configurable transmit de-emphasis
so the output can be optimized for driving additional lengths
of cables or FR4 traces.
Features
Optimized for HDMI/DVI source and repeater applications
TMDS compatible inputs with configurable receive
equalization supporting data rates up to 2.25 Gbps
TMDS compatible outputs with configurable transmit de-
emphasis
Dedicated CDR on each data channel reduces jitter
transfer
Resistor adjustable differential output voltage for AC
coupled Cat5e and Cat6 extension applications
2 equalizer settings for a wide range of cable reaches up
to 2.25 Gbps
Total Output Jitter of 0.09 UI at 2.25 Gbps
DVI 1.0 and HDMI v1.3a compatible TMDS source and
sink interface
7 mm x 7 mm 48 pin LLP package
>8 kV HBM ESD protection
0 °C to +70 °C operating temperature
Applications
Repeater Applications
HDMI / DVI Extender
Source Applications
Video Cards
Blu-ray DVD Players
Game Consoles
Sink Applications
High Definition Displays
Projectors
Application Diagram
© 2009 National Semiconductor Corporation 300949
30094953
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DS22EV5110 Datasheet, Funktion
Symbol
Parameter
www.DataSheDeat4tUa .Ccohmannel Random Jitter
Condition
RJ Random Jitter (Notes 4, 5, 6)
Data Channel CDR Jitter Generation
TROJ1
Total Output Jitter Data Paths, measured at
0.25 Gbps
TPC PRBS7, EQ [2:0] = 000
Figure 1, (Notes 4, 5, 6)
TROJ2
Total Output Jitter
1.65 Gbps
Data Paths, measured at
TPC PRBS7, EQ [2:0] = 000
Figure 1, (Notes 4, 5, 6)
TROJ3
Total Output Jitter
2.25 Gbps
Data Paths, measured at
TPC PRBS7, EQ [2:0] = 000
Figure 1, (Notes 4, 5, 6)
BWLOOP
CDR Loop
Bandwidth
0.25 Gbps data rate
1.65 Gbps data rate
2.25 Gbps data rate
Clock Channel PLL Jitter Generation
TROJ4
Clock Path, measured at
Total Output Jitter TPC
25 MHz
Figure 1
(Notes 4, 5, 6)
TROJ5
Clock Path, measured at
Total Output Jitter TPC
165 MHz
Figure 1
(Notes 4, 5, 6)
TROJ6
Clock Path, measured at
Total Output Jitter TPC
225 MHz
Figure 1
(Notes 4, 5, 6)
Min
Typ
3
0.03
0.08
0.09
0.25
1.65
2.25
0.03
0.07
0.08
Max
0.05
0.14
0.16
Unit
psrms
UIp-p
UIp-p
UIp-p
MHz
MHz
MHz
0.045
UIp-p
0.13 UIp-p
0.135
UIp-p
Note 1: “Absolute Maximum Ratings” are the ratings beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits.
Note 2: Allowed supply noise (mVp-p sine wave) at typical condition.
Note 3: Typical parameters are measured at VDD = 3.3 V, TA = 25 °C. They are for reference purposes, and are not production-tested.
Note 4: Parameter is guaranteed by statistical analysis and/or design.
Note 5: Deterministic jitter is measured at the differential outputs (TPC of Figure 1), minus the deterministic jitter before the test channel (TPA of Figure 1). Random
jitter is removed through the use of averaging or similar means.
Note 6: Total Jitter is defined as peak-to-peak deterministic jitter from + 12 times random jitter (ps).
Note 7: Random jitter contributed by the equalizer is defined as sq rt (JOUT2 − JIN2). JOUT is the random jitter at equalizer outputs in ps-rms, see TPC of Figure
1; JIN is the random jitter at the input of the equalizer in ps-rms, see TPA of Figure 1.
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DS22EV5110 pdf, datenblatt
www.DataShAeept4Up.cloicmation Information
The DS22EV5110 is a DVI/HDMI video signal reconditioning
device. The device conforms to DVI v1.0 and HDMI v1.3a
standards supporting up to 6.75 Gbps total throughput TMDS
data for 1080p with 36 bit deep color depth.
TYPICAL APPLICATION
The DS22EV5110 is used as a DVI/HDMI source device, sink
device, or a repeater device, see Figure 8. As the source de-
vice, the output de-emphasis setting should be configured
based on the driving cable length. When used as the sink de-
vice, the levels of the equalization boost of the input data
channels should be optimized based on the receiving cable
length. The DS22EV5110 can also be used as a repeater in
an external extender box with the equalization and de-em-
phasis level settings optimized to provide the maximum cable
reach.
FIGURE 8. Typical Application Diagram
30094953
DC AND AC COUPLED APPLICATIONS
The DS22EV5110 is designed to support TMDS differential
pairs with DC coupled transmission lines. It contains integrat-
ed termination resistors (50), pulled up to VDD at the input
stage, and open collector outputs for DVI / HDMI signaling.
Figure 9 shows the DC coupled connection between the HD-
MI Source (ie. DS22EV5110) and HDMI Sink (ie.
DS22EV5110) devices. In the DC coupled application, the
external resistance of 24 kat VOD_CRL pin is used at the
Source to ensure the VO level of 1000 mVp-p. The AC cou-
pled method connecting between the Source and the Sink
devices may be preferred to eliminate the impact of the
ground potential difference, or to use one CAT5/6 cable be-
tween two chassis. To optimize the DS22EV5110 perfor-
mance, the external resistance of 12 kat the VOD_CRL pin
should be used on the Source DS22EV5110, and a pair of 50
pull-up resistors should be placed close to the outputs of
the Source DS22EV5110, in order to DC bias the output driv-
er. Meanwhile, 622pull-down resistors should be placed at
the inputs of the Sink DS22EV5110 device, in order to set the
input common mode to a 3.05 V. Note AC coupled configu-
ration is not compliant to the HDMI specification of Source
requirement (See Figure 10).
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FIGURE 9. DC Coupled Application
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