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PDF DS1842 Data sheet ( Hoja de datos )
| Número de pieza | DS1842 | |
| Descripción | Bias Output Stage | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-4557; Rev 0; 4/09
www.DataSheet4U.com
76V, APD, Bias Output Stage with
Current Monitoring
General Description
The DS1842 integrates the discrete high-voltage com-
ponents necessary for avalanche photodiode (APD)
bias and monitor applications. A switch FET is used in
conjunction with an external DC-DC controller to create
a boost DC-DC converter. A current clamp limits cur-
rent through the APD and also features an external
shutdown. The device also includes a dual current mir-
ror to monitor the APD current.
Applications
APD Biasing
GPON Optical Network Unit and Optical Line
Transmission
Pin Configuration appears at end of data sheet.
Features
♦ 76V Maximum Boost Voltage
♦ Switch FET
♦ Current Monitor with a Wide 1µA to 2mA Range,
Fast 50ns Time Constant, and 10:1 and 5:1 Ratio
♦ 2mA Current Clamp with External Shutdown
♦ Multiple External Filtering Options
♦ 3mm x 3mm, 14-Pin TDFN Package with Exposed Pad
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
DS1842N+
DS1842N+T&R
-40°C to +85°C
-40°C to +85°C
14 TDFN-EP*
14 TDFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
*EP = Exposed pad.
Typical Application Circuit
3.3V
SW
FB
CCOMP RCOMP
COMP
D2
DS1875
LX
GATE
DS1842
MIRIN
CBULK
GND
CURRENT MIRROR
MIR1
CLAMP
CURRENT
LIMIT
MIROUT
MIR2
ROSA
APD
TIA
EXTERNAL MONITOR
MON3
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page  
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76V, APD, Bias Output Stage with
Current Monitoring
MIR1
REF
CLAMP
Figure 1. Current Clamp from Current Feedback
Detailed Description
The DS1842 contains discrete high-voltage compo-
nents required to create an APD bias voltage and to
monitor the APD bias current. The device’s mirror out-
puts are a current that is a precise ratio of the output
current across a large dynamic range. The mirror
response time is fast enough to comply with GPON Rx
burst-mode monitoring requirements. The device has a
built-in current-limiting feature to protect APDs. The
APD current can also be shut down by CLAMP or ther-
mal shutdown. The internal FET is used in conjunction
with a DC-DC boost controller to precisely create the
APD bias voltage.
Current Mirror
The DS1842 has two current mirror outputs. One is a
10:1 mirror connected at MIR1, and the other is a 5:1
mirror connected to MIR2.
The mirror output is typically connected to an ADC
using a resistor to convert the mirrored current into a
voltage. The resistor to ground should be selected such
that the maximum full-scale voltage of the ADC is
reached when the maximum mirrored current is
reached. For example, if the maximum monitored cur-
rent through the APD is 2mA with a 1V ADC full scale,
and the 10:1 mirror is used, then the correct resistor is
approximately 5kΩ. If both MIR1 and MIR2 are con-
nected together, the correct resistor is 1.6kΩ.
The mirror response time is dominated by the amount
of capacitance placed on the output. For burst-mode
Rx systems where the fastest response times are
required (approximately a 50ns time constant), a 3.3pF
capacitor and external op amp should be used to
buffer the signal sent to the ADC. For continuous mode
applications, a 10nF capacitor is all that is required on
the output.
Current Clamp
The DS1842 has a current clamping circuit to protect
the APD by limiting the amount of current from MIROUT.
There are three methods of current clamping available.
1) Internally Defined Current Limit
The device’s current clamp circuit automatically clamps
the current when it exceeds ICLAMP.
2) External Shutdown Signal
The CLAMP pin can completely shut down the current
from MIROUT. The CLAMP pin is active high.
3) Precise Level Set by External Feedback Circuit
A feedback circuit is used to control the level applied to
the CLAMP pin. Figure 1 shows an example feedback
circuit.
Thermal Shutdown
As a safety feature, the DS1842 has a thermal-shut-
down circuit that turns off the MIROUT and MIRIN cur-
rents when the internal die temperature exceeds
TSHDN. These currents resume after the device has
cooled.
Switch FET and Diode
The DS1842 switching FET is designed to complement
the DS1875 controller’s built-in DC-DC boost controller.
Other DC-DC converters are also compatible, including
the MAX1932. APD biasing of 16V to 76V can be
achieved using the DS1842.
_______________________________________________________________________________________ 5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet DS1842.PDF ] | |
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