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PDF AD5293 Data sheet ( Hoja de datos )

Número de pieza AD5293
Descripción Digital Potentiometer
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Single Channel, 1024-Position, 1% R-Tol, Digital
Potentiometer
Preliminary Technical Data
FEATURES
Single-channel, 1024-position resolution
20 kΩ, 50 kΩ and 100 kΩ nominal resistance
Calibrated 1% Nominal Resistor Tolerance
Rheostat mode temperature coefficient: 35 ppm/°C
Voltage divider temperature coefficient: 5 ppm/°C
+21V to +30V single-supply operation
±10.5V to ±15V dual-supply operation
SPI® compatible serial interface
Wiper setting readback
APPLICATIONS
Mechanical potentiometer replacement
Instrumentation: gain, offset adjustment
Programmable voltage to current conversion
Programmable filters, delays, time constants
Programmable power supply
Low resolution DAC replacement
Sensor calibration
GENERAL DESCRIPTION
The AD5293 is a single-channel, 1,024-position digital
potentiometer1 with less than 1% end-to-end Resistor Tolerance
error. The AD5293 performs the same electronic adjustment
function as a mechanical potentiometer with enhanced
resolution, solid state reliability, and superior low temperature
coefficient performance. This device is capable of operating at
high-voltages; supporting both dual supply ±10.5 to ±15V and
single supply operation +21V to +30V.
The AD5293 offers guaranteed industry leading low resistor
tolerance errors of ±1% with a nominal temperature coefficient
of 35 ppm/ºC. The low resistor tolerance feature simplifies
open-loop applications as well as precision calibration and
tolerance matching applications.
AD5293
FUNCTIONAL BLOCK DIAGRAM
Figure 1. 14ld TSSOP
The AD5293 is available in a compact 14ld TSSOP package. The
part is guaranteed to operate over the extended industrial
temperature range of −40°C to +105°C.
1 The terms digital potentiometer and RDAC are used interchangeably.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2008 Analog Devices, Inc. All rights reserved.

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AD5293 pdf
www.DParteaSlihmeeint4aUr.cyomTechnical Data
AD5293
ELECTRICAL CHARACTERISTICS – 50KΩ AND 100KΩ VERSIONS
VDD = 21V to 30V, VSS = 0V; VDD = 10.5V to 16.5V, VSS = -10.5V to -16.5V; VLOGIC = 2.7V to 5.5V, VA = VDD, VB = VSS , −40°C < TA < +105°C,
unless otherwise noted.
Table 2.
Parameter
Symbol
DC CHARACTERISTICS— RHEOSTAT MODE
Resolution
N
Resistor Differential Nonlinearity2
R-DNL
Resistor Integral Nonlinearity2
R-INL
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
∆RAB/RAB
(∆RAB/RAB)/∆T × 106
Wiper Resistance
RW
DC CHARACTERISTICS— POTENTIOMETER DIVIDER MODE
Resolution
N
Differential Nonlinearity4
DNL
Integral Nonlinearity4
INL
Voltage Divider Temperature
Coefficient
(∆VW/VW)/∆T × 106
Full-Scale Error
VWFSE
Zero-Scale Error
VWZSE
RESISTOR TERMINALS
Terminal Voltage Range5
Capacitance6 A, B
VA, B, W
CA, B
Capacitance6 W
CW
Common-Mode Leakage Current6
DIGITAL INPUTS
Input Logic High
Input Logic Low
Input Current
Input Capacitance6
DIGITAL OUTPUTS(SDO and RDY)
Output High Voltage
ICM
VIH
VIH
VIL
IIL
CIL
VOH
Conditions
RWB
Code = half-scale
Code = full scale
Code = zero scale
f = 1 MHz, measured to GND,
Code = half-scale
f = 1 MHz, measured to GND,
Code = half-scale
VA = VB = VW
VLOGIC = 4.5V to 5.5 V
VLOGIC = 2.7V to 3.6 V
VLOGIC = 2.7V to 5.5 V
VIN = 0 V or VLOGIC
RPULL_UP = 2.2kΩ to VLOGIC
Output Low Voltage
VOL RPULL_UP = 2.2kΩ to VLOGIC
Three state Leakage Current
Output Capacitance6
POWER SUPPLIES
Single-Supply Power Range
Dual-Supply Power Range
Positive Supply Current
Negative Supply Current
Logic Supply Range
Logic Supply Current
OTP Read Current6,7
Power Dissipation8
Power Supply Rejection Ratio6
COL
VDD
VDD/VSS
IDD
ISS
VLOGIC
ILOGIC
ILOGIC
ILOGIC_FUSE_READ
PDISS
PSSR
VSS = 0 V
VDD / VSS = ±16.5 V
VDD /VSS = ±16.5 V
VLOGIC = 5 V; VIH = 5 V or VIL = GND
VLOGIC = 3 V; VIH = 3 V or VIL = GND
VIH = 5 V or VIL = GND
VIH = 5 V or VIL = GND
∆VDD/∆VSS = ±15 V ± 10%
Min Typ1 Max Unit
10 Bits
−1 +1 LSB
−1 +1 LSB
−1 0.5 +1 %
35 ppm/°C
TBD TBD Ω
10
−1
−1
5
−6
0
Bits
+1 LSB
+1 LSB
ppm/°C
0 LSB
TBD LSB
VSS
50
VDD V
pF
40 pF
0.001
JEDEC compliant
2.0
1.8
5
50
0.8
±1
nA
V
V
V
µA
pF
VLOGIC -
0.4
V
Gnd V
+0.4V
-1 1 µA
5 pF
21
±10.5
2.7
TBD
TBD
TBD
TBD
TBD
TBD
0.0006
30
±16.5
TBD
TBD
5.5
TBD
TBD
TBD
0.002
V
V
µA
µA
V
µA
µA
mA
µW
%/%
Rev. PrA | Page 5 of 15

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AD5293 arduino
www.DParteaSlihmeeint4aUr.cyomTechnical Data
THEORY OF OPERATION
The AD5293 digital potentiometer is designed to operate as a
true variable resistor for analog signals that remain within the
terminal voltage range of VSS < VTERM < VDD. The digital
potentiometer wiper position is determined by the RDAC
register contents. The RDAC register acts as a scratchpad
register, allowing as many value changes as necessary to place
the potentiometer wiper in the correct position. The RDAC
register can be programmed with any position setting using the
standard SPI serial interface by loading the 16-bit data-word.
The AD5293 also features a patented 1% end-to-end resistor
tolerance. This simplifies precision, rheostat mode, and open-
loop applications where knowledge of absolute resistance is
critical.
RDAC REGISTER
The RDAC register directly controls the position of the digital
potentiometer wiper. For example, when the RDAC register is
loaded with all zeros, the wiper is connected to Terminal B of
the variable resistor. The RDAC register is a standard logic
register; there is no restriction on the number of changes
allowed. The RDY pin can be used to monitor the completion of
a write to or read from the RDAC register. Prior to 20-TP
activation, the AD5293 presets to mid-scale on power-up.
WRITE PROTECTION
On power-up, the serial data input register write command for
the RDAC register is disabled. The RDAC write protect bit, C1
of the control register (Table 8), is set to 0 by default. This
disables any change of the RDAC register content regardless of
the software commands, except that the RDAC register can be
refreshed to midscale using the software reset command
(command #3) or through hardware by the RESET pin. To
enable programming of the variable resistor wiper position
(programming the RDAC register) the write protect bit C1 of
the control register must first be programmed. This is
accomplished by loading the serial data input register with
Command #4 (Table 7).
BASIC OPERATION
The basic mode of setting the variable resistor wiper position
(programming the RDAC register) is accomplished by loading
the serial data input register with Command #1 (Table 7) and
the desired wiper position data. The RDY pin can be used to
monitor the completion of this RDAC register write command.
(Command #2, Table 7) can be used to readback the contents of
the RDAC register. After issuing the readback command the
RDY pin can be monitored to indicate when the data is
available to be read out on SDO in the next SPI operation.
Instead of monitoring the RDY pin, a minimum delay(Table 3)
can be implemented when executing a write or read command.
Table 6, provides an example listing of a sequence of serial data
AD5293
input (DIN) words with the serial data output appearing at the
SDO pin in hexadecimal format for an RDAC write and read.
Table 6. RDAC Register Write and Read
DIN SDO
Action
0x1802 0xXXXX Enable update of wiper position
0x0600 0x1803
Write 0x100 to the RDAC register,
Wiper moves to ¼ fullscale
position.
0x0800 0x0600
Prepare data read from RDAC
Register
0x0000 0x0100
NOP instruction 0 sends 16-bit
word out of SDO, where last 10-
bits contain the contents of the
RDACl Register.
POWER-DOWN MODE
The AD5293 can be powered down by executing the software
powerdown command, command 6 (Table 7), and setting the
LSB to 1. This feature reduces the power supply current to
(TBD) µA and places the RDAC in a zero-power-consumption
state where Terminal Ax is open-circuited and the Wiper Wx is
connected to Terminal Bx.
RESET
A low to high transition of the hardware RESET pin loads the
RDAC Register with midscale. The AD5293 can also be reset
through software by executing command 3(Table 7).
SERIAL DATA INTERFACE
The AD5293 contains a serial interface (SYNC, SCLK, DIN and
SDO), which is compatible with SPI interface standards, as well
as most DSPs. This device allows writing of data via the serial
interface to every register.
INPUT SHIFT REGISTER
For the AD5293 the input shift register is 16 bits wide (see
Figure 2). The 16-bit word consists of two unused bits (should
be set to zero), followed by four control bits, and ten RDAC
data bits. Data is loaded MSB first (Bit 15). The four control bits
determine the function of the software command (Table 7).
Figure 3 shows a timing diagram of a typical AD5293 write
sequence.
The write sequence begins by bringing the SYNC line low. The
SYNC pin must be held low until the complete data-word is
loaded from the DIN pin. When SYNC returns high, the serial
data-word is decoded according to the instructions in Table 7.
The command bits (Cx) control the operation of the digital
Rev. PrA | Page 11 of 15

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