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ADN4600 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADN4600
Beschreibung Asynchronous Crosspoint Switch
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
ADN4600 Datasheet, Funktion
www.DataSheet4U.com
4.25 Gbps, 8 × 8,
Asynchronous Crosspoint Switch
ADN4600
FEATURES
Full 8 × 8 crossbar connectivity
Fully buffered signal path supports multicast and broadcast
operation
Optimized for dc to 4.25 Gbps data
Programmable receive equalization
Compensates for up to 30 in. of FR4 @ 4.25 Gbps
Programmable transmit pre-emphasis/de-emphasis
Compensates for up to 30 in. of FR4 @ 4.25 Gbps
Flexible 1.8 V to 3.3 V core supply
Per lane positive/negative (P/N) pair inversion for routing ease
Low power: 125 mW/channel at 4.25 Gbps
DC- or ac-coupled differential CML inputs
Programmable CML output levels
50 Ω on-chip termination
−40°C to +85°C temperature range operation
Supports 8b10b, scrambled or uncoded nonreturn-to-zero
(NRZ) data
I2C control interface
Package: 64-lead LFCSP
APPLICATIONS
1×, 2×, 4× FibreChannel
XAUI
Gigabit Ethernet over backplane
10GBase-CX4
InfiniBand®
50 Ω cables
GENERAL DESCRIPTION
The ADN4600 is an asynchronous, nonblocking crosspoint
switch with eight differential PECL-/CML-compatible inputs
with programmable equalization and eight differential CML
outputs with programmable output levels and pre-emphasis or
de-emphasis. The operation of this device is optimized for NRZ
data at rates up to 4.25 Gbps.
The receive inputs provide programmable equalization with
nine settings to compensate for up to 30 in. of FR4 and
programmable pre-emphasis with seven settings to compensate
for up to 30 in. of FR4 at 4.25 Gbps.
IP[7:0]
IN[7:0]
FUNCTIONAL BLOCK DIAGRAM
RECEIVE
EQUALIZATION
CROSSPOINT
ARRAY
ADN4600
TRANSMIT
PRE-EMPHASIS
EQ PE
OP[7:0]
ON[7:0]
ADDR[1:0]
SCL
SDA
RESETB
CONTROL LOGIC
Figure 1.
The ADN4600 nonblocking switch core implements an 8 × 8
crossbar and supports independent channel switching through the
I2C control interface. Every channel implements an asynchronous
path supporting NRZ data rates from dc to 4.25 Gbps. Each
channel is fully independent of other channels. The ADN4600
has low latency and very low channel-to-channel skew.
The main application for the ADN4600 is to support switching
on the backplane, line card, or cable interface sides of serial links.
The ADN4600 is packaged in a 9 mm × 9 mm, 64-lead LFCSP
package and operates from −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.






ADN4600 Datasheet, Funktion
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ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VCC to VEE
VTTI
VTTO
Internal Power Dissipation
Differential Input Voltage
Logic Input Voltage
Storage Temperature Range
Lead Temperature
Rating
3.7 V
VCC + 0.6 V
VCC + 0.6 V
4.26 W
2.0 V
VEE − 0.3 V < VIN < VCC + 0.6 V
−65°C to +125°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 6 of 6

6 Page









ADN4600 pdf, datenblatt
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450000
400000
350000
300000
250000
200000
150000
100000
50000
0
–8
–6 –4 –2
0
24
JITTER (ps)
6
Figure 25. Random Jitter Histogram
8 10
100
90
80
tR/tF
70
60
50
–60 –40 –20
0
20 40 60
TEMPERATURE (°C)
80
Figure 26. Rise Time/Fall Time vs. Temperature
100
Rev. 0 | Page 12 of 12

12 Page





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