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Número de pieza | CLC2005 | |
Descripción | 260MHz Rail-to-Rail Amplifier | |
Fabricantes | Cadeka | |
Logotipo | ||
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No Preview Available ! Data Sheet
Comlinear® CLC2005
Dual, Low Cost, +2.7V to 5.5V, 260MHz
Rail-to-Railwww.datasheet4u.com Amplifier
Amplify the Human Experience
FEATURES
n 260MHz bandwidth
n Fully specified at +2.7V and +5V supplies
n Output voltage range:
0.036V to 4.953V; Vs = +5; RL = 2kΩ
n Input voltage range:
-0.3V to +3.8V; Vs = +5
n 145V/μs slew rate
n 4.2mA supply current per amplifier
n ±55mA linear output current
n ±85mA short circuit current
n Directly replaces AD8052 and AD8042 in
single supply applications
n Pb-free SOIC-8 package
APPLICATIONS
n A/D driver
n Active filters
n CCD imaging systems
n CD/DVD ROM
n Coaxial cable drivers
n High capacitive load driver
n Portable/battery-powered applications
n Twisted pair driver
n Video driver
General Description
The Comlinear CLC2005 is a dual, low cost, voltage feedback amplifier.
This amplifier is designed to operate on +2.7V,+5V, or ±2.5V supplies. The
input voltage range extends 300mV below the negative rail and 1.2V below
the positive rail. The CLC2005 offers superior dynamic performance
with a 260MHz small signal bandwidth and 145V/μs slew rate. The
combination of low power, high output current drive, and rail-to-rail
performance make the Comlinear CLC2005 well suited for battery-pow-
ered communication/computing systems. The combination of low cost and
high performance make the Comlinear CLC2005 suitable for high volume
applications in both consumer and industrial applications such as wireless
phones, scanners, and color copiers.
Output Swing
2.7
Vs = +2.7V
RL = 2kΩ
G = -1
0
Time (0.5μs/div)
Ordering Information
Part Number
CLC2005ISO8
CLC2005ISO8X
Package
SOIC-8
SOIC-8
Moisture sensitivity level for all parts is MSL-1.
©2007-2009 CADEKA Microcircuits LLC
Pb-Free
Yes
Yes
Operating Temperature Range
-40°C to +85°C
-40°C to +85°C
Packaging Method
Rail
Reel
www.cadeka.com
1 page Data Sheet
Electrical Characteristics
Vs = 5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Symbol Parameter
Frequency Domain Response
UGBW
-3dB Bandwidth(2)
wwwB.WdaStSasheet4u.-c3odmB Bandwidth
BWLS
Large Signal Bandwidth
GBWP
Gain Bandwidth Product
Time Domain Response
tR, tF
tS
OS
Rise and Fall Time(2)
Settling Time to 0.1%
Overshoot
SR Slew Rate
Distortion/Noise Response
HD2
2nd Harmonic Distortion(2)
HD3
3rd Harmonic Distortion(2)
DG Differential Gain
DP Differential Phase
en Input Voltage Noise
in Input Current Noise
XTALK
Crosstalk(2)
DC Performance
VIO
dVIO
Ib
dIb
IIO
PSRR
Input Offset Voltage(1)
Average Drift
Input Bias Current(1)
Average Drift
Input Offset Current(1)
Power Supply Rejection Ratio(1)
AOL Open-Loop Gain(1)
IS Quiescent Current(1)
Input Characteristics
RIN
CIN
CMIR
Input Resistance
Input Capacitance
Common Mode Input Range
CMRR
Common Mode Rejection Ratio(1)
Output Characteristics
Conditions
G = +1, VOUT = 0.05Vpp
G = +2, VOUT = 0.2Vpp
G = +2, VOUT = 2Vpp
VOUT = 0.2V step
VOUT = 2V step
VOUT = 0.2V step
5V step, G = -1
2Vpp, 5MHz
2Vpp, 5MHz
2Vpp, 5MHz
NTSC (3.85MHz), AC-Coupled, RL = 150Ω
NTSC (3.85MHz), DC-Coupled, RL = 150Ω
NTSC (3.85MHz), AC-Coupled, RL = 150Ω
NTSC (3.85MHz), DC-Coupled, RL = 150Ω
>1MHz
>1MHz
10MHz
DC
Per Amplifier
DC, Vcm = 0V to Vs -1.5
RL = 10kΩ to Vs/2
VOUT
Output Voltage Swing
RL = 2kΩ to Vs/2
RL = 150Ω to Vs/2(1)
IOUT Output Current
ISC Short-Circuit Output Current
Vs Power Supply Operating Range
-40°C to +85°C
Notes:
1. 100% tested at 25°C.
2. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0).
©2004-2009 CADEKA Microcircuits LLC
Min Typ Max Units
260 MHz
90 MHz
40 MHz
90 MHz
3.6 ns
40 ns
7%
145 V/µs
71 dBc
78 dBc
70 dB
0.06 %
0.08 %
0.07 °
0.06 °
16 nV/√Hz
1.3 pA/√Hz
62 dB
-8 1.4 +8 mV
10 µV/°C
-8 3 +8 µA
7 nA/°C
-0.8 0.1 +0.8 µA
52 57
dB
68 78
dB
4.2 5.2 mA
4.3
1.8
-0.3 to 3.8
72 87
MΩ
pF
V
dB
0.027 to
4.97
0.036 to
4.953
0.3
0.12 to
4.8
4.625
±55
±50
±85
2.5 5 5.5
V
V
V
mA
mA
mA
V
www.cadeka.com 5
5 Page Data Sheet
Input
www.datasheet4u.com
RL = 2kΩ
Vin =2Vpp
G=5
Rf = 1kΩ
Output
Refer to the evaluation board layouts shown in Figure 7
for more information.
When evaluating only one channel, complete the following
on the unused channel:
1. Ground the non-inverting input.
2. Short the output to the inverting input.
Time (20ns/div)
Figure 4: Overdrive Recovery
Driving Capacitive Loads
The Frequency Response vs. CL plot on page 6, illustrates
the response of the CLC2005. A small series resistance
(Rs) at the output of the amplifier, illustrated in Figure 5,
will improve stability and settling performance. Rs values
in the Frequency Response vs. CL plot were chosen to
achieve maximum bandwidth with less than 1dB of peak-
ing. For maximum flatness, use a larger Rs.
+
-
Rg
Rf
Rs
CL RL
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of this device:
Eval Board
CEB006
Description
Dual Channel, Dual Supply
8 lead SOIC
Products
CLC2005SO8
Evaluation board schematics and layouts are shown in
Figure 6 and Figure 7.
The CEB006 evaluation board is built for dual supply
operation. Follow these steps to use the board in a single
supply application:
1. Short -Vs to ground.
2. Use C3 and C4, if the -Vs pin of the CLC2005 is
not directly connected to the ground plane.
Figure 5: Typical Topology for driving a capacitive load
Layout Considerations
General layout and supply bypassing play major roles
in high frequency performance. Cadeka has evaluation
boards to use as a guide for high frequency layout and to
aid in device testing and characterization. Follow the steps
below as a basis for high frequency layout:
■ Include 6.8μF and 0.1μF ceramic capacitors
■ Place the 6.8μF capacitor within 0.75 inches of the
power pin
■ Place the 0.1μF capacitor within 0.1 inches of the
power pin
■ Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
■ Minimize all trace lengths to reduce series inductances
Figure 6: Evaluation Board Schematic
©2004-2009 CADEKA Microcircuits LLC
www.cadeka.com 11
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet CLC2005.PDF ] |
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