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PDF AN703 Data sheet ( Hoja de datos )
| Número de pieza | AN703 | |
| Descripción | Designing DC/DC Converters | |
| Fabricantes | Vishay Intertechnology | |
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AN703
Vishay Siliconix
AN703
Designing DC/DC Converters with the
Si9110 Switchmode Controller
In distributed power systems and battery-powered equipment,
the advantages of MOS over bipolar technology for pulse-
width modulation (PWM) controllers are significant. First, by
using a BiC/DMOS power IC process, a high-voltage DMOS
transistor can be integrated with a CMOS PWM controller to
serve as a pre-regulator stage. This reduces the number of
external components by permitting the power controller IC to
interface directly to the power bus.
The second advantage of MOS is speed. Bipolar PWM
controllers can be made fast, but only with a significant
increase in supply current. Logic gate delays of 5 ns are
readily achievable using 5-µm CMOS, comparator
propagation delays are in the 50- to 100-ns range, and the
supply current is maintained below 1 mA.
How does speed translate into power supply performance?
The answer is first in reliability and second in power density. If
the delay time is long between the sensing of an overcurrent
condition in the power switch and the turn-off of the switch,
then the peak and RMS current values reach excessive levels
and the switch fails. A well-designed power supply should
tolerate a continuous short circuit on any output. To
accomplish this with a slow controller IC, extra protection
circuitry or an oversized switching transistor and heatsink are
required. But that costs money.
Power supply density (often expressed as output power in
watts divided by volume in cubic inches) has steadily been
increasing over the past 5 to 10 years. By increasing the
switching frequency, the size of magnetics and filter
capacitors has been reduced, allowing smaller and less
expensive power supplies to be built. To increase the
switching frequency to the 100- to 500-kHz range and still
achieve high reliability requires that the current limit delay time
be kept under approximately 100 ns.
The first BiC/DMOS switchmode controller IC to meet these
requirements is the Si9110. Its 500-kHz rating for maximum
switching frequency is fully usable, thanks to the high-speed
current limit comparator and the efficient output driver stage,
which essentially eliminates the shoot-through current found
in bipolar totem-pole circuits. The DMOS transistor in the
input pre-regulator has a breakdown voltage rating of 120 V,
which provides ample headroom for operation from typical bus
voltages in distributed power systems (where 12, 24, 48, and
60 V are frequently encountered).
The appeal of such distributed power processing systems is in
their flexibility and reliability. By bussing power at a higher
voltage, smaller conductors can be used, as well as fewer
connector pins to get the power to where it is needed-on the
circuit card. An on-card power supply can then provide the
voltages needed in that part of the system. The power bus
voltage is usually chosen to be low enough to eliminate the
need for safety agency approvals, and a battery can be
connected through a diode to the power bus to provide
emergency back-up. The distributed power approach is
employed in telecom systems, large minicomputers, and in
other applications where reliability is a primary concern.
To illustrate some of the performance capabilities of this BiC/
DMOS switchmode controller IC, a 15-W forward converter
design is presented. The converter provides +5-V and ±12-V
outputs from a 9- to 36-V input range. This permits the power
supply to operate from 12-V or 24-V batteries, or from a 28-V
aircraft power source. Before describing the forward converter
example, it is instructive to review the operation of each of the
Si9110 switchmode controller’s functional blocks.
FUNCTIONAL DESCRIPTION
Pre-Regulator
A BiC/DMOS power integrated circuit process is used to
integrate a high-voltage (120-V rated) lateral DMOS transistor
with the CMOS PWM controller. By using an ion implant to
shift the gate threshold to a negative value, as shown in
Figure 1, the transistor is made to operate as a depletion-
mode device. This eliminates the need for a pull-up voltage
above VIN to turn the device on, and an amplifier and voltage
reference can be used to implement a linear regulator, as
shown in Figure 2. The CMOS circuitry is thus protected from
transients which appear on the input power bus.
FIGURE 1. Depletion-Mode MOSFET Characteristics
FIGURE 2. Pre-regulator/Start-up Circuit
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AN703
Vishay Siliconix
FIGURE 8. Output Drive Characteristics
FORWARD CONVERTER
Specifications
Input Voltage: 9 to 36 V
OUTPUT VOLTAGES
Minimum Maximum
Load
Load Regulation
(mA)
(A)
(%)
Ripple
(mVp-p)
+5 50
1.5
2 150
+12 50
0.310
5
40
-12 20
0.310
5
40
Efficiency:
VIN = 12 V, Full Load: 78% typical, 76% minimum
VIN = 12 V, ½ Load: 82% typical, 80% minimum
Switching Frequency 100 kHz
Circuit Description
The forward converter schematic is shown in Figure 9, and a
block diagram of the Si9110/Si9111 controller IC appears in
Figure 10 for easy reference. The circuit employs a TL431C
voltage reference/amplifier to drive the LED of the opto-
isolator, U3. This maintains galvanic isolation between input
and output voltages. Since a reference is needed on the
secondary side, external to the PWM controller IC, it is not
necessary to have a precision reference on the primary side.
The voltage reference of the Si9111 is specified at 4 V ±10%,
which is accurate enough to establish a dc bias point for the
collector current of U3. If galvanic isolation is not required,
then the feedback circuitry in the box can be replaced by a
voltage divider network, and the input and output grounds
must be tied together. In this configuration, the reference
accuracy of the PWM controller IC limits the accuracy of the
output voltages, and the Si9110 with its 1% reference should
be specified. The two ICs are identical in all other respects.
The SMP25N06 switching transistor (Q1) is a 25-A, 60-V
MOSFET in a T0-220 package. The breadboard was operated
without a heatsink on Q1, even with the power supply output
shorted. Three secondaries on the transformer, T1, provide
isolated voltages of +5 V and ±12 V. The output inductors are
wound on a common core. This reduces the size and cost
compared to separate output chokes, as well as improves the
response to dynamic loads. The same core size is used for
the transformer and the output inductor, the only difference
being the air gap required by the inductor to sustain a dc flux.
The transformer does not require a gap since the winding, N2,
resets the core flux to zero during the “off” time of Q1.
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AN703
Vishay Siliconix
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ID
(5 A/div)
+5 V
(500 mV/div)
VGS
(10 V/div)
FIGURE 19. Step Load Response
Small-Signal Analysis
A very concise presentation of small-signal analysis of
current-mode control loops can be found in Reference 1. In
that paper, the Y-parameter model, shown here in Figure 20,
is developed for current-programmed power stages since Y-
parameters give an output current for a unit of control voltage
input. The inner current loop is demonstrated to be stable, as
long as slope compensation is employed for D > 0.5, and
therefore, the current loop can be absorbed into the new
power stage model. This has the advantage of allowing us to
analyze the stability of only one (voltage) control loop.
The derivations will not be presented here, but the resulting
control-to-output voltage transfer function of the buck
regulator is shown in Figure 21. R22 is the low frequency
value of the inverse of the output admittance, Y22. It is a
measure of how effectively current programming makes the
power stage behave as a current source and, consequently,
depends heavily upon the gain of the inner current loop. More
inductance yields higher current loop gain and larger R22.
Smaller R22 causes the low frequency gain to be diminished,
since R22 appears in parallel with the load, RL. R22 also
decreases the low-frequency pole by the same factor. In this
case, R2C is simply the sense resistance value of 0.1 Ω. For
buck-derived converters, it is the ratio of voltage at the
current-mode comparator input to inductor current, and it
accounts for current amplifier gains and current transformer
ratios. The second pole at ωC/2π depends upon the switching
frequency, the amount of slope compensation, and the duty
ratio at the dc operating point (remember that this is a small-
signal analysis of variations around a dc operating point); it
does not depend on the load current.
An easy way to work through the calculations is to form a
table, as shown in Table 1. The voltage-control loop
bandwidth, fvc, and phase margin, φm, are calculated at full
load for three different input voltages. The same symbols are
used as in reference 1, with the exceptions that the current
ramp slopes m1, m2, and m3 are referenced to the current-
mode comparator input. The result is the same as long as the
current scale factor, Rf, is taken into account.
FIGURE 20. Y-parameter Model for Current-mode Regulators
FIGURE 21. Small-signal Control to Output Transfer Function of Current-programmed Buck Regulators
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| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet AN703.PDF ] | |
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