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Número de pieza | AA88348AP | |
Descripción | 8-BIT DAC | |
Fabricantes | Agamem Microelectronic | |
Logotipo | ||
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Agamem Microelectronics Inc. AA88348AP
PRELIMINARY
8-BIT DAC
FEATURE
z 12 bits serial data input(3 wire serial data
Pin Assignment (Top View)
transfer method, DI, CLK, LD)
z R-2R resistor ladder used for D/A conversion
z 8 channels with 8-bit resolution monotonic D/A
VSS
1
16 GND
converted
AO2 2
15 AO1
z 8 channel buffer operational amplifiers operating
in the full voltage range from VCC to GND only
if VDD=VCC and VSS=GND
AO3
AO4
3
4
14 DI
13 CLK
z Max. 10 MHz serial digital data input
AO5 5
12 LD
z Serial I/O for cascade application
z Max. 1.0 mA output drive/sink current
z Two separate power supply/ground lines for
AO6
AO7
6
7
11 DO
10 AO8
system and analog power supply
z Single +5 V system power supply
VDD
8
9 VCC
DESCRIPTION
The AA88348AP is a CMOS processed AA88348AP is a single 5V power DAC.
digital to analog converter (DAC) with 8-bit Analog DC output could be full voltage swing
reso- lotion, low leakage current and low as the analog power is equal to the system
operating current. The AA88348AP has 8 power
.
channels with build in operational amplifier In addition to normal D/A converter
output buffers which could operate in the applications, AA88348AP is also available for
full-swing voltage range from VCC to GND electronic volume and instead of potentio-
and enhance the Drive/Sink ability up to max. meters for adjustment due to its high stability
1mA.
on the capacitive load.
.
Digital data (DI) input serially in a max. 10 16 pins TSSOP package type are available
MHz clock (CLK) rate. The latched 12-bit for AA88348AP. Its operational temper- nature
digital data is converted into an analog DC range is specified over –20 to 85 .
voltage in the range from VSS to VDD with
8-bit resolution in one of the eight channels by
the D/A converter in a max. 20 s settling time.
1 2006/7/5
1 page www.DataSheet4U.com
Agamem Microelectronics Inc. AA88348AP
PRELIMINARY
Data Input Format
CLK
DI
MSB
D11 D10 D9
8-BIT DAC
LSB
D2 D1 D0
LD
AO1~8
Past Data
New Data
Data Format in Shift Register
LSB MSB
DI D0 D 1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
Data Address
84
To Data Latch
To Address Decoder
DO
Data Conversion
Data
D7 D6 D5 D4 D3 D2 D1 D0
0 0000000
0 0000001
0 0000010
DAC Output Level
AOx
VSS
VSS + LSB*
VSS + 2 * LSB
1 1111110
1 1111111
* LSB = (VDD-VSS)/255
5
VDD - LSB
VDD
2006/7/5
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet AA88348AP.PDF ] |
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