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PDF EDGE6436 Data sheet ( Hoja de datos )
| Número de pieza | EDGE6436 | |
| Descripción | (EDGE6435 / EDGE6436) Per-Pin Electronics Companion DAC | |
| Fabricantes | Semtech Corporation | |
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TESwTwwA.DNatDaShMeetE4UA.cSomUREMENT PRODUCTS
Description
Edge6435/6436
Per-Pin Electronics
Companion DAC
The Edge6435/6436 is a low-cost, 40-channel, monolithic The Edge6435/6436 features 2 ranks of input latches
ATE level DAC solution manufactured in a wide-voltage into each DAC, whereby all DAC values may be updated
bi-CMOS process.
at one time.
The Edge6435/6436 features independent buffered
voltage and current outputs that are serially programmed
and can be used to provide all of the reference levels
required for up to 8 channels of pin electronics in an ATE
system.
Designated Voltage Output DACs
– Wide Voltage Range (16.75V)
– Adjustable Full-Scale Range
– Adjustable Minimum Offset Voltage
– 13-bit Resolution
– 11-bit Accuracy (E6436)
– 10-bit Accuracy (E6435)
Selectable Voltage/Current Output DACs
– Wide Voltage/Current Range (16.75V/2 mA)
– Adjustable Full-Scale Range
– Adjustable Minimum Offset
– Configurable as either Voltage or Current Output
– 13-bit Resolution
– 11-bit Accuracy (E6436)
– 10-bit Accuracy (E6435)
Designated Current Output DACs
– 1.6 mA Range
– Adjustable Full-Scale Range
– 6-bit Resolution
For Automated Test Equipment, the Edge6435/6436 can
support Pin Electronics and Parametric Measurement Units
whose outputs are in the range of –3.25V to +13V, and
Driver Super Voltages to +13V after calibration. It provides
10 or 5 per pin levels for 4 or 8 channels respectively.
The Edge6435/6436 is designed such that DACs may be
shared for various levels whereby minimizing the total
number of DACs required in a specific application.
Features
• 40 DACs Partitioned into 4 Groups for 4 or 8
Pin Channels
• Wide Voltage Output Range (16.75V Range)
• 24 Voltage DACs per Package
• 8 Voltage / Current DACs per Package
• 8 Current DACs per Package
• Adjustable Full-Scale Range and Offset per Group
• DUT GND or Analog GND Reference per Group
• Self-Calibrating DACs via Internal Offset,
Gain Registers
• Two Offset, Gain Registers to Support Sharing of
DACs
• DAC Programming per Channel or Set of Channels
• Readback of DAC Input Data and Output Value
• Small 100-Pin MQFP Package
• Low-Cost, Highly Integrated Multi-DAC Solution
On-chip, digital storage of offset and gain calibration
coefficients allow the E6435/6436 output levels to be
programmed using “Ideal Code”, helping to reduce some
of the complexity and time normally associated with
programming level DACs in ATE systems.
Applications
PINCAST allows the Edge6435/6436 to further reduce
this complexity and time by allowing channels across
multiple Edge6435/6436 devices to be digitally assigned
to up to 8 distinct sets that can be addressed and
programmed with a limited number of instructions.
• Automated Test Equipment (ATE)
• Cost Sensitive applications requiring multiple
programmable voltage and currents
Revision 3 / August 25, 2006
1
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1 page  
Edge6435/6436
TEST AND MEASUREMENT PRODUCTS
PINwwDwe.DsatcaSrihpeetti4oUn.co(mcontinued)
Pin Name
Resistor Connections
R_MASTER
Pin #
70
R_VGAIN_A
R_VGAIN_B
R_VGAIN_C
R_OFFSET_A
R_OFFSET_B
R_OFFSET_C
R_IGAIN_C
R_IGAIN_D
71
24
56
72
23
55
62
5
Description
External resistor connection used in combination with R_VGAIN_A, R_VGAIN_B, and
R_VGAIN_C to set the maximum output range for the Group A, B, and C voltage
output DACs.
External Resistor connection used in combination with R_MASTER to set the
maximum range for the group A voltage DAC outputs.
External Resistor connection used in combination with R_MASTER to set the
maximum range for the group B voltage DAC outputs.
External Resistor connection used in combination with R_MASTER to set the
maximum range for the group C voltage DAC outputs.
External resistor connection used to set the base offset voltage for group A voltage
DAC outputs.
External resistor connection used to set the base offset voltage for group B voltage
DAC outputs.
External resistor connection used to set the base offset voltage for group C voltage
DAC outputs.
External resistor connection used to set the maximum range for the group C current
DAC outputs.
External resistor connection used to set the maximum range for the group D current
DAC outputs.
2006 Semtech Corp. / Rev. 3, 8/25/06
5
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5 Page 
Edge6435/6436
TEST AND MEASUREMENT PRODUCTS
Circwuwwit.DDataeSshecert4ipU.tcioomn (continued)
Serial Programming
The Edge6435/6436 is programmed with 24-bit serial data
(Figure 6) in either a 4 channel (Figure 4) or 8 Channel
(Figure 5) format.
Following the input of serial data, it is loaded into a central
register by LOAD (Figure 1). The central register’s contents
are stored in the “addressed” latch by the STORE input.
Tables 3 and 4 show the “Address Maps” for the 4 and 8
channel formats.
belong to none, one, or any combination of up to 8 distinct
sets. The address maps show that a channel’s DAC (or
Function) may be addressed individually, or a DAC (or
Function) of multiple channels belonging to the same set
may be programmed in parallel. Figure 11 shows an
example of addressing channels by sets.
Referring to Table 3, a Channel’s function is programmed
as indicated in Figure 9 (offset and gain selection as well
as Group C DAC V/I output selection, see below).
Referring to Table 3 for 4 channel format, a channel’s
DACs Set Register or Function may be addressed and the
“stored” value changed. For each DAC, there are
associated multiple latches (Figures 2 and 3). For the
13-bit DACs (Figure 2) the DAC’s output is a function of
the contents of its value, gain and offset latches. The
Edge6435/6436 features two gain and offset latches per
DAC whereby a DAC’s output may be shared. For example,
in ATE a DAC’s value may be shared between a pin driver’s
high level and a pin’s parametric unit’s high limit level,
where each application requires different offset and gain
factors to calibrate each path correctly. Gains and offsets
are computed externally to the Edge6435/6436 in the
process of pin channel level calibration in the ATE. Gains
and offsets are stored in the Edge6435/6436 in the same
manner as other latches. Selection of what is stored is
determined by the “register selection” bits in the 24-bit
input data (Figures 2 and 4). Upon storing a 13-bit DAC’s
Value, the resultant DAC’s ((Value x Gain) + Offset +
4096
Value) is updated by UPDATEA (Figure 2) into the DAC’s
output latch of RANKA. The contents of all RANKA latches
may be transferred to RANKB latches, in parallel, across
multiple Edge6435/6436’s by the UPDATE input into the
Edge6435/6436. The RANK input into the Edge6435/
6436 selects either RANKA or RANKB latches for all DACs.
For the 6-bit DACs (Figure 3) the DAC’s output is selected
from four “value latches”.
Channel’s Functions (for 13 bit DACs only), with
R2 = R1 = R0 = 0, then:
D0 = 0: Selects 1st Offset/Gain Registers
D0 = 1: Selects 2nd Offset/Gain Registers
D1 = 0: Selects Voltage Output on Group C DACs
D1 = 1: Selects Current Output on Group C DACs
Referring to Table 4 for 8 channel format, and Figures 2,
3, 5, 8 and 10, a channel’s DACs, Set Registers and
Function, etc. are programmed and operate similar to the
4 channel format described above.
NOTE: The STORE of a DAC’s offset or gain does not
result in a DAC output change. Only upon the STORE of a
DAC or set of DAC’s “value” does the Edge6435/6436
compute the input to DAC’s “A” latches.
In a tester having multiple Edge6435/6436s, DACs or
channel functions may be programmed individually or as
a set (1 of 8) of channels across all channels. If multiple
E6435/6436s are programmed in parallel, individual DAC
or Function programming requires the STORE input to the
associated Edge6435/6436 to be applied where all STORE
inputs to other Edge6435/6436s are to be inhibited
(externally). Programming a DAC or Function of a Set of
Channels requires STORE input to be applied to all
Edge6435/6436s. Edge6435/6436’s DACs may be
“updated” in parallel following the programming of DACs
as individual DACs or sets of DACs.
Referring to Table 3, a channels Set Register may also be
programmed. This is an independent 8-bit register per
channel which determines the “sets” to which the channel
belongs. Figure 7 shows details of programming a
channel’s Set Register, which is stored in the
Edge6435/6436 by the STORE input. A channel may
2006 Semtech Corp. / Rev. 3, 8/25/06
11
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EDGE6436.PDF ] | |
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