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ADE7166 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADE7166
Beschreibung Single-Phase Energy Measurement IC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADE7166 Datasheet, Funktion
Data Sheet
Single-Phase Energy Measurement IC
with 8052 MCU, RTC, and LCD Driver
ADE7116/ADE7166/ADE7169/ADE7566/ADE7569
GENERAL FEATURES
Wide supply voltage operation: 2.4 V to 3.7 V
Internal bipolar switch between regulated and battery inputs
Ultralow power operation with power saving modes (PSM)
Full operation: 4 mA to 1.6 mA (PLL clock dependent)
Battery mode: 3.2 mA to 400 µA (PLL clock dependent)
Sleep mode
Real-time clock (RTC) mode: 1.5 µA
RTC and LCD mode: 38 µA (LCD charge pump enabled)
Reference: 1.2 V ± 0.1% (10 ppm/°C drift)
64-lead RoHS package option
Low profile quad flat package (LQFP)
Operating temperature range: −40°C to +85°C
ENERGY MEASUREMENT FEATURES
Proprietary analog-to-digital converters (ADCs) and digital
signal processing (DSP) provide high accuracy active
(watt), reactive (var), and apparent energy (volt ampere
(VA)) measurement
<0.1% error on active energy over a dynamic range of
1000 to 1 at 25°C
<0.5% error on reactive energy over a dynamic range of
1000 to 1 at 25°C (ADE7169 and ADE7569 only)
<0.5% error on root mean square (rms) measurements
over a dynamic range of 500 to 1 for current (Irms) and
100 to 1 for voltage (Vrms) at 25°C
Supports IEC 62053-21, IEC 62053-22, and IEC 62053-23;
EN 50470-3 Class A, Class B, and Class C; and ANSI C12-16
Differential input with programmable gain amplifiers (PGAs)
supports shunts, current transformers, and di/dt current
sensors (ADE7169 and ADE7569 only)
2 current inputs for antitamper detection in the ADE7116/
ADE7166/ADE7169
High frequency outputs proportional to Irms, active, reactive,
or apparent power (AP)
Table 1. Features Available on Each Device
Feature
Part No.
Antitamper
ADE7116, ADE7166, ADE7169
Watt, VA, Irms, Vrms
ADE7116, ADE7166, ADE7169, ADE7566,
ADE7569
Var ADE7169, ADE7569
di/dt Sensor
ADE7169, ADE7569
MICROPROCESSOR FEATURES
8052-based core
Single-cycle 4 MIPS 8052 core
8052-compatible instruction set
32.768 kHz external crystal with on-chip PLL
2 external interrupt sources
External reset pin
Low power battery mode
Wake up from input/output (I/O), temperature change1,
alarm, and universal asynchronous receiver/transmitter
(UART)
LCD driver operation
Temperature measurement
Real-time clock (RTC)
Counter for seconds, minutes, and hours
Automatic battery switchover for RTC backup
Operation down to 2.4 V
Ultralow battery supply current: 1.5 µA
Selectable output frequency: 1 Hz to 16 kHz
Embedded digital crystal frequency compensation for
calibration and temperature variation of 2 ppm resolution
Integrated LCD driver
108-segment driver for the ADE7566/ADE7569 and
104-segment driver for the ADE7116/ADE7166/ADE7169
2×, 3×, or 4× multiplexing
LCD voltages generated internally1 or with external resistors
Internal adjustable drive voltages up to 5 V independent
of power supply level1
On-chip peripherals
UART interface
SPI or I2C
Watchdog timer
Power supply management with user selectable levels
Memory: 16 kB flash memory, 512 bytes RAM
Development tools
Single pin emulation
IDE based assembly and C-source debugging
1 Not available in the ADE7116.
Rev. C
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2015 Analog Devices, Inc. All rights reserved.
Technical Support
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ADE7166 Datasheet, Funktion
ADE7116/ADE7166/ADE7169/ADE7566/ADE7569
Data Sheet
SPECIFICATIONS
VDD = 3.3 V ± 5%, AGND = DGND = 0 V, on-chip reference XTALx = 32.768 kHz, TMIN to TMAX = −40°C to +85°C, unless otherwise noted.
ENERGY METERING
Table 2.
Parameter
Min Typ
Max Unit
MEASUREMENT ACCURACY1
Phase Error Between Channels2
PF = 0.8 Capacitive
±0.05
Degrees
PF = 0.5 Inductive
±0.05
Degrees
Active Energy Measurement Error2
0.1 % of reading
AC Power Supply Rejection2
Output Frequency Variation
0.01 %
DC Power Supply Rejection2
Output Frequency Variation
0.01 %
Active Energy Measurement Bandwidth1
8
kHz
Reactive Energy Measurement Error2, 3
0.5
% of reading
Vrms Measurement Error2
Vrms Measurement Bandwidth1
Irms Measurement Error2
Irms Measurement Bandwidth1
ANALOG INPUTS
0.5 % of reading
3.9 kHz
0.5 % of reading
3.9 kHz
Maximum Signal Levels
±400 mV peak
ADE7566/ADE7569
±400 mV peak
ADE7116/ADE7166/ADE7169
±250 mV peak
Input Impedance (DC)
770 kΩ
ADC Offset Error2
±10 mV
±1 mV
Gain Error2
Current Channel
±3 %
Voltage Channel
±3 +3 %
Gain Error Match
±0.2 %
CF1 AND CF2 PULSE OUTPUT
Maximum Output Frequency
13.5 kHz
Duty Cycle
Active High Pulse Width
FAULT DETECTION4
Fault Detection Threshold
Inactive Input ≠ Active Input
Input Swap Threshold
Inactive Input > Active Input
Accuracy Fault Mode Operation
IPA Active, IPB = AGND
IPB Active, IPA = AGND
Fault Detection Delay
Swap Delay
50 %
90 ms
6.25 % of active
6.25 % of active
0.1 % of reading
0.1 % of reading
3 Seconds
3 Seconds
Test Conditions/Comments
Phase lead: 37°
Phase lag: 60°
Over a dynamic range of 1000 to 1 at 25°C
VDD = 3.3 V + 100 mV rms/120 Hz
IPx = VP = ±100 mV rms
VDD = 3.3 V ± 117 mV dc
Over a dynamic range of 1000 to 1 at 25°C
Over a dynamic range of 100 to 1 at 25°C
Over a dynamic range of 500 to 1 at 25°C
VP − VN differential input
IP − IN differential input
IPA − IN and IPB − IN differential inputs
PGA1 = PGA2 = 1
PGA1 = 16
IPA = IPB = 0.4 V dc or IP = 0.4 V dc
VP − VN = 0.4 V dc
VP − VN = 400 mV peak, IPA − IN = 250 mV,
PGA1 = 2 sine wave
If CF1 or CF2 frequency, >5.55 Hz
If CF1 or CF2 frequency, <5.55 Hz
IPA or IPB active
IPA or IPB active
Over a dynamic range of 500 to 1
Over a dynamic range of 500 to 1
1 These specifications are not production tested but are guaranteed by design and/or characterization data on production release.
2 See the Terminology section for definition.
3 This function is not available in the ADE7166 or ADE7566.
4 This function is not available in the ADE7566 or ADE7569.
Rev. C | Page 6 of 152

6 Page









ADE7166 pdf, datenblatt
ADE7116/ADE7166/ADE7169/ADE7566/ADE7569
Data Sheet
Table 8. SPI Master Mode Timing (SPICPHA = 0) Parameters
Parameter
Description
tSL SCLK low pulse width
tSH SCLK high pulse width
tDAV Data output valid after SCLK edge
tDOSU Data output setup before SCLK edge
tDSU Data input setup time before SCLK edge
tDHD Data input hold time after SCLK edge
tDF Data output fall time
tDR Data output rise time
tSR SCLK rise time
tSF SCLK fall time
Min
2SPIR × tCORE1
2SPIR × tCORE1
0
tCORE1
Typ
(SPIR + 1) × tCORE1
(SPIR + 1) × tCORE1
19
19
19
19
1 tCORE depends on the clock divider or CD[2:0] bits of the POWCON SFR, Address 0xC5 (see Table 26); tCORE = 2CD/4.096 MHz.
Max
3 × tCORE1
75
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK
(SPICPOL = 0)
SCLK
(SPICPOL = 1)
MOSI
tSH tSL
tDOSU
tDAV
tDF
MSB
tDR
BITS [6:1]
tSR tSF
LSB
MISO
MSB IN
BITS [6:1]
LSB IN
tDSU tDHD
Figure 6. SPI Master Mode Timing (SPICPHA = 0)
Rev. C | Page 12 of 152

12 Page





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