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AD8197A Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8197A
Beschreibung 4:1 HDMI/DVI Switch
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
AD8197A Datasheet, Funktion
4:1 HDMI/DVI Switch with Equalization
AD8197A
FEATURES
4 inputs, 1 output HDMI/DVI link
Enables HDMI 1.3-compliant receiver
Pin-to-pin compatible with the AD8191A
4 TMDS channels per link
Supports 250 Mbps to 2.25 Gbps data rates
Supports 25 MHz to 225 MHz pixel clocks
www.DataSheet4U.cEoqmualized inputs for operation with long HDMI cables
(20 meters at 2.25 Gbps)
Fully buffered unidirectional inputs/outputs
Globally switchable, 50 Ω on-chip terminations
Pre-emphasized outputs
Low added jitter
Single-supply operation (3.3 V)
4 auxiliary channels per link
Bidirectional unbuffered inputs/outputs
Flexible supply operation (3.3 V to 5 V)
HDCP standard compatible
Allows switching of DDC bus and 2 additional signals
Output disable feature
Reduced power dissipation
Removable output termination
Allows building of larger arrays
2 AD8197A devices support HDMI/DVI dual-link
Standards compatible: HDMI receiver, HDCP, DVI
Serial (I2C slave) and parallel control interface
100-lead, 14 mm × 14 mm LQFP, Pb-free package
APPLICATIONS
Multiple input displays
Projectors
A/V receivers
Set-top boxes
Advanced television (HDTV) sets
GENERAL DESCRIPTION
The AD8197A is an HDMI™/DVI switch featuring equalized
TMDS® inputs and pre-emphasized TMDS outputs, ideal for
systems with long cable runs. Outputs can be set to a high
impedance state to reduce the power dissipation and/or to allow
the construction of larger arrays using the wire-OR technique.
The AD8197A is provided in a 100-lead LQFP, Pb-free, surface-
mount package, specified to operate over the −40°C to +85°C
temperature range.
FUNCTIONAL BLOCK DIAGRAM
PARALLEL
SERIAL
2
2
I2C_SDA
I2C_SCL
I2C_ADDR[2:0]
VTTI
3
CONFIG
INTERFACE
RESET
AD8197A
CONTROL
LOGIC
AVCC
DVCC
AMUXVCC
AVEE
DVEE
IP_A[3:0] +
IN_A[3:0]
IP_B[3:0] +
IN_B[3:0]
IP_C[3:0]
+–
IN_C[3:0]
IP_D[3:0] +
IN_D[3:0]
4
4
4
4
4
4 EQ
4
4
SWITCH
CORE
PE
4
4
HIGH SPEED BUFFERED
VTTO
+ OP[3:0]
ON[3:0]
VTTI
AUX_A[3:0]
AUX_B[3:0]
AUX_C[3:0]
AUX_D[3:0]
4
4
4
SWITCH
CORE
4
4
LOW SPEED UNBUFFERED
BIDIRECTIONAL
AUX_COM[3:0]
Figure 1.
TYPICAL APPLICATION
MEDIA CENTER
HDTV SET
GAME CONSOLE
SET-TOP BOX
HDMI
RECEIVER
AD8197A
DVD PLAYER
04:20
Figure 2. Typical HDTV Application
PRODUCT HIGHLIGHTS
1. Supports data rates up to 2.25 Gbps, enabling 1080p deep
color (12-bit color) HDMI formats, and greater than
UXGA (1600 × 1200) DVI resolutions.
2. Input cable equalizer enables use of long cables at the input
(more than 20 meters of 24 AWG cable at 2.25 Gbps).
3. Auxiliary switch routes a DDC bus and two additional signals
for a single-chip, HDMI 1.3 receive-compliant solution.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.






AD8197A Datasheet, Funktion
AD8197A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
www.DataSheet4U.com
AVCC
IN_B0
IP_B0
AVEE
IN_B1
IP_B1
VTTI
IN_B2
IP_B2
AVEE
IN_B3
IP_B3
AVCC
IN_A0
IP_A0
AVEE
IN_A1
IP_A1
VTTI
IN_A2
IP_A2
AVCC
IN_A3
IP_A3
AVEE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PIN 1 INDICATOR
AD8197A
TOP VIEW
(Not to Scale)
75 AVCC
74 IP_C3
73 IN_C3
72 AVEE
71 IP_C2
70 IN_C2
69 VTTI
68 IP_C1
67 IN_C1
66 AVEE
65 IP_C0
64 IN_C0
63 AVCC
62 IP_D3
61 IN_D3
60 AVEE
59 IP_D2
58 IN_D2
57 VTTI
56 IP_D1
55 IN_D1
54 AVCC
53 IP_D0
52 IN_D0
51 AVEE
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
1, 13, 22, 54, 63, 75
AVCC
2 IN_B0
3 IP_B0
4, 10, 16, 25, 51, 60, 66, 72 AVEE
5 IN_B1
6 IP_B1
7, 19, 57, 69
VTTI
8 IN_B2
9 IP_B2
11 IN_B3
12 IP_B3
14 IN_A0
15 IP_A0
17 IN_A1
18 IP_A1
20 IN_A2
21 IP_A2
23 IN_A3
Figure 3. Pin Configuration
Type 1
Power
HS I
HS I
Power
HS I
HS I
Power
HS I
HS I
HS I
HS I
HS I
HS I
HS I
HS I
HS I
HS I
HS I
Description
Positive Analog Supply. 3.3 V nominal.
High Speed Input Complement.
High Speed Input.
Negative Analog Supply. 0 V nominal.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
Rev. 0 | Page 6 of 28

6 Page









AD8197A pdf, datenblatt
AD8197A
50
40
30
DJ (p-p)
20
10
RJ (rms)
www.DataSheet4U.c0o0m 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
DIFFERENTIAL INPUT SWING (V)
Figure 20. Jitter vs. Differential Input Swing
50
45
40
35
30
25
20
15
10
5
0
–40
DJ (p-p)
RJ (rms)
–20 0
20 40 60
TEMPERATURE (°C)
Figure 21. Jitter vs. Temperature
80 100
160
140
FALL TIME
120
RISE TIME
100
80
60
40
20
0
–40 –20
0
20 40 60 80
TEMPERATURE (°C)
Figure 22. Rise and Fall Time vs. Temperature
100
50
40
30
DJ (p-p)
20
10
RJ (rms)
0
2.5 2.7 2.9 3.1 3.3 3.5
INPUT COMMON-MODE VOLTAGE (V)
Figure 23. Jitter vs. Input Common-Mode Voltage
3.7
120
115
110
105
100
95
90
85
80
–40
–20
0
20 40 60 80 100
TEMPERATURE (°C)
Figure 24. Differential Input Termination Resistance vs. Temperature
Rev. 0 | Page 12 of 28

12 Page





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