Datenblatt-pdf.com


AD5765 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5765
Beschreibung DAC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 29 Seiten
AD5765 Datasheet, Funktion
Data Sheet
Complete Quad, 16-Bit, High Accuracy,
Serial Input, ±5 V DAC
AD5765
FEATURES
Complete quad, 16-bit digital-to-analog converter (DAC)
Programmable output range: ±4.096 V, ±4.201 V, or ±4.311 V
±1 LSB maximum INL error, ±1 LSB maximum DNL error
Low noise: 70 nV/√Hz
Settling time: 10 μs maximum
Integrated reference buffers
On-chip die temperature sensor
Output control during power-up/brownout
Programmable short-circuit protection
Simultaneous updating via LDAC
Asynchronous CLR to zero code
Digital offset and gain adjustment
Logic output control pins
DSP-/microcontroller-compatible serial interface
Temperature range: −40°C to +105°C
iCMOS® process technology1
APPLICATIONS
Industrial automation
Open-/closed-loop servo control
Process control
Data acquisition systems
Automatic test equipment
Automotive test and measurement
High accuracy instrumentation
GENERAL DESCRIPTION
The AD5765 is a quad, 16-bit, serial input, bipolar voltage
output, digital-to-analog converter (DAC) that operates from
supply voltages of ±4.75 V to ±5.25 V. The nominal full-scale
output range is ±4.096 V. The AD5765 provides integrated
output amplifiers, reference buffers, and proprietary power-
up/power-down control circuitry. The part also features a
digital I/O port, which is programmed via the serial interface.
The part incorporates digital offset and gain adjustment
registers per channel.
The AD5765 is a high performance converter that offers
guaranteed monotonicity, integral nonlinearity (INL) of ±1 LSB,
low noise, and 10 μs settling time. During power-up (when the
supply voltages are changing), the outputs are clamped to 0 V
via a low impedance path.
The AD5765 uses a serial interface that operates at clock rates of
up to 30 MHz and is compatible with DSP and microcontroller
interface standards. Double buffering allows the simultaneous
updating of all DACs. The input coding is programmable to
either a twos complement or an offset binary format. The
asynchronous clear function clears all DAC registers to either
bipolar zero or zero scale, depending on the coding used. The
AD5765 is ideal for both closed-loop servo control and open-
loop control applications. The AD5765 is available in a 32-lead
TQFP and offers guaranteed specifications over the −40°C to
+105°C industrial temperature range. Figure 1 contains a
functional block diagram of the AD5765.
Table 1. Related Devices
Part No. Description
AD5764
Complete quad, 16-bit, high accuracy, serial input,
±10 V DAC
AD5763
Complete dual, 16-bit, high accuracy, serial input,
±5 V DAC
1 For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher voltage levels, iCMOS is a technology
platform that enables the development of analog ICs capable of 30 V and operating at ±15 V supplies, allowing dramatic reductions in power consumption and
package size and increased ac and dc performance.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2009–2011 Analog Devices, Inc. All rights reserved.






AD5765 Datasheet, Funktion
Data Sheet
Parameter
DIGITAL OUTPUTS (D0, D1, SDO)2
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
High Impedance Leakage Current
High Impedance Output
Capacitance
DIE TEMPERATURE SENSOR
Output Voltage at 25°C
Output Voltage Scale Factor
Output Voltage Range
Output Load Current
Power-On Time
POWER REQUIREMENTS
AVDD/AVSS
DVCC
AIDD
AISS
DICC
Power Supply Sensitivity2
∆VOUT/∆ΑVDD
Power Dissipation
B Grade1
0.4
DVCC − 1
0.4
DVCC − 0.5
±1
5
C Grade1
0.4
DVCC − 1
0.4
DVCC − 0.5
±1
5
1.44
3
1.175 to 1.9
200
10
1.44
3
1.175 to 1.9
200
10
4.75 to 5.25
2.7 to 5.25
2.25
1.9
1.2
4.75 to 5.25
2.7 to 5.25
2.25
1.9
1.2
−110
76
−110
76
1 Temperature range: −40°C to +105°C; typical at +25°C.
2 Guaranteed by design and characterization; not production tested.
3 Output amplifier headroom requirement is 0.5 V minimum.
Unit
V max
V min
V max
V min
µA max
pF typ
V typ
mV/°C typ
V min to V max
µA max
ms typ
V min to V max
V min to V max
mA/channel max
mA/channel max
mA max
dB typ
mW typ
AD5765
Test Conditions/Comments
DVCC = 5 V ± 5%, sinking 200 µA
DVCC = 5 V ± 5%, sourcing 200 µA
DVCC = 2.7 V to 3.6 V, sinking 200 µA
DVCC = 2.7 V to 3.6 V, sourcing 200 µA
SDO only
SDO only
Outputs unloaded
Outputs unloaded
VIH = DVCC, VIL = DGND, 750 µA typ
±5 V operation output unloaded
Rev. C | Page 5 of 28

6 Page









AD5765 pdf, datenblatt
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD5765
32 31 30 29 28 27 26 25
SYNC 1
SCLK 2
SDIN 3
SDO 4
CLR 5
LDAC 6
D0 7
D1 8
PIN 1
AD5765
TOP VIEW
(Not to Scale)
24 AGNDA
23 VOUTA
22 VOUTB
21 AGNDB
20 AGNDC
19 VOUTC
18 VOUTD
17 AGNDD
NC = NO CONNECT 9 10 11 12 13 14 15 16
Figure 6. Pin Configuration
Table 7. Pin Function Descriptions
Pin No. Mnemonic Description
1 SYNC
Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is
transferred in on the falling edge of SCLK.
2 SCLK
Serial Clock Input. Data is clocked into the shift register on the falling edge of SCLK. This operates at clock speeds
of up to 30 MHz.
3 SDIN
Serial Data Input. Data must be valid on the falling edge of SCLK.
4 SDO
Serial Data Output. This is used to clock data from the serial register in daisy-chain or readback mode.
51 CLR
Negative Edge Triggered Input. Asserting this pin sets the DAC registers to 0x0000.
6 LDAC
Load DAC. Logic input. This is used to update the DAC registers and consequently the analog outputs. When tied
permanently low, the addressed DAC register is updated on the rising edge of SYNC. If LDAC is held high during
the write cycle, the DAC input register is updated but the output update is held off until the falling edge of LDAC.
In this mode, all analog outputs can be updated simultaneously on the falling edge of LDAC. The LDAC pin must
not be left unconnected.
7, 8 D0, D1
9 RSTOUT
D0 and D1 form a digital I/O port. The user can set up these pins as inputs or outputs that are configurable and
readable over the serial interface. When configured as inputs, these pins have weak internal pull-ups to DVCC. When
programmed as outputs, D0 and D1 are referenced by DVCC and DGND.
Reset Logic Output. This is the output from the on-chip voltage monitor used in the reset circuit. If desired, it can
be used to control other system components.
10 RSTIN
Reset Logic Input. This input allows external access to the internal reset logic. Applying a Logic 0 to this input
clamps the DAC outputs to 0 V. In normal operation, RSTIN should be tied to Logic 1. Register values remain
unchanged.
11 DGND
Digital Ground Pin.
12
13, 31
14
DVCC
AVDD
PGND
Digital Supply Pin. Voltage ranges from 2.7 V to 5.25 V.
Positive Analog Supply Pins. Voltage ranges from 4.75 V to 5.25 V.
Ground Reference Point for Analog Circuitry.
15, 30
16
AVSS
ISCC
Negative Analog Supply Pins. Voltage ranges from –4.75 V to –5.25 V.
This pin is used in association with an optional external resistor to AGND to program the short-circuit current of
the output amplifiers. See the Design Features section for additional details.
17 AGNDD Ground Reference Pin for the DAC D Output Amplifier.
18 VOUTD Analog Output Voltage of DAC D. This provides buffered output with a nominal full-scale output range of ±4.096 V. The
output amplifier is capable of directly driving a 5 kΩ, 200 pF load.
Rev. C | Page 11 of 28

12 Page





SeitenGesamt 29 Seiten
PDF Download[ AD5765 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
AD5760Voltage Output DACAnalog Devices
Analog Devices
AD5761Voltage Output DACAnalog Devices
Analog Devices
AD5761RBipolar/Unipolar Voltage Output DACsAnalog Devices
Analog Devices
AD5762RBipolar Voltage Output DACs PreliminaryAnalog Devices
Analog Devices
AD5763DACAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche