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PC28F256P30 Schematic ( PDF Datasheet ) - Numonyx

Teilenummer PC28F256P30
Beschreibung StrataFlash Embedded Memory
Hersteller Numonyx
Logo Numonyx Logo 




Gesamt 30 Seiten
PC28F256P30 Datasheet, Funktion
Numonyx™ StrataFlash® Embedded Memory
(P30)www.DataSheet4U.com
Product Features
Datasheet
„ High performance
„ Security
— 85 ns initial access
— One-Time Programmable Registers:
— 52 MHz with zero wait states, 17ns clock-to-data output
• 64 unique factory device identifier bits
synchronous-burst read mode
• 2112 user-programmable OTP bits
— 25 ns asynchronous-page read mode
— Selectable OTP Space in Main Array:
— 4-, 8-, 16-, and continuous-word burst mode
— Buffered Enhanced Factory Programming (BEFP) at 5 μs/
byte (Typ)
— 1.8 V buffered programming at 7 μs/byte (Typ)
• Four pre-defined 128-KByte blocks (top or bottom
configuration)
• Up to Full Array OTP Lockout
— Absolute write protection: VPP = VSS
„ Architecture
— Multi-Level Cell Technology: Highest Density at Lowest
Cost
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down
— Asymmetrically-blocked architecture
„ Software
— Four 32-KByte parameter blocks: top or bottom
— 20 μs (Typ) program suspend
configuration
— 20 μs (Typ) erase suspend
— 128-KByte main blocks
— Numonyx™ Flash Data Integrator optimized
„ Voltage and Power
— VCC (core) voltage: 1.7 V – 2.0 V
— VCCQ (I/O) voltage: 1.7 V – 3.6 V
— Standby current: 20μA (Typ) for 64-Mbit
— Basic Command Set and Extended Command Set
compatible
— Common Flash Interface capable
„ Density and Packaging
— 4-Word synchronous read current:
13 mA (Typ) at 40 MHz
— 56- Lead TSOP package (64, 128, 256,
512- Mbit)
„ Quality and Reliability
— Operating temperature: –40 °C to +85 °C
— Minimum 100,000 erase cycles per block
— ETOX™ VIII process technology
— 64- Ball Numonyx™ Easy BGA package (64,
128, 256, 512- Mbit)
— Numonyx™ QUAD+ SCSP (64, 128, 256,
512- Mbit)
— 16-bit wide data bus
Order Number: 306666-11
November 2007






PC28F256P30 Datasheet, Funktion
P30
1.0
www.DataSheet4U.com
1.1
Introduction
This document provides information about the Numonyx™ StrataFlash® Embedded
Memory (P30) product and describes its features, operation, and specifications.
The Numonyx™ StrataFlash® Embedded Memory (P30) product is the latest generation
of Numonyx™ StrataFlash® memory devices. Offered in 64-Mbit up through 512-Mbit
densities, the P30 device brings reliable, two-bit-per-cell storage technology to the
embedded flash market segment. Benefits include more density in less space, high-
speed interface, lowest cost-per-bit NOR device, and support for code and data
storage. Features include high-performance synchronous-burst read mode, fast
asynchronous access times, low power, flexible security options, and three industry
standard package choices. The P30 product family is manufactured using Intel* 130 nm
ETOX™ VIII process technology.
The P30 product family is also planned on the Intel* 65nm process lithography. 65nm
AC timing changes are noted in this datasheet, and should be taken into account for all
new designs.
Nomenclature
1.8 V:
3.0 V:
9.0 V:
VCC (core) voltage range of 1.7 V – 2.0 V
VCCQ (I/O) voltage range of 1.7 V – 3.6 V
VPP voltage range of 8.5 V – 9.5 V
Block:
Main block:
Parameter block:
Top parameter device:
Bottom parameter device:
A group of bits, bytes, or words within the flash memory array that erase simultaneously
when the Erase command is issued to the device. The P30 has two block sizes: 32-KByte
and 128-KByte.
An array block that is usually used to store code and/or data. Main blocks are larger than
parameter blocks.
An array block that is usually used to store frequently changing data or small system
parameters that traditionally would be stored in EEPROM.
A device with its parameter blocks located at the highest physical address of its memory
map.
A device with its parameter blocks located at the lowest physical address of its memory
map.
1.2 Acronyms
BEFP:
CUI:
MLC:
OTP:
PLR:
PR:
RCR:
Buffer Enhanced Factory Programming
Command User Interface
Multi-Level Cell
One-Time Programmable
Protection Lock Register
Protection Register
Read Configuration Register
Datasheet
6
November 2007
Order Number: 306666-11

6 Page









PC28F256P30 pdf, datenblatt
P30
Table 4: Easy BGA Package Dimensions
Product Information
Symbol
Millimeters
Min
Nom
Max
Min
Inches
Nom
Package Height (64/128/256-Mbit)
A-
- 1.200 -
-
Package Height (512-Mbit)
A-
- 1.300 -
-
Ball Height
A1 0.250
-
- 0.0098 -
Package Body Thickness (64/128/256-
Mbit)
A2
- 0.780 -
- 0.0307
www.DataSheet4U.coPmackage Body Thickness (512-Mbit)
Ball (Lead) Width
A2 - 0.910 -
- 0.0358
b
0.330
0.430
0.530 0.0130 0.0169
Package Body Width
D 9.900 10.000 10.100 0.3898 0.3937
Package Body Length
E 12.900 13.000 13.100 0.5079 0.5118
Pitch
[e] - 1.000 -
- 0.0394
Ball (Lead) Count
N - 64 -
- 64
Seating Plane Coplanarity
Y-
- 0.100 -
-
Corner to Ball A1 Distance Along D
S1
1.400
1.500
1.600 0.0551 0.0591
Corner to Ball A1 Distance Along E
S2
2.900
3.000
3.100 0.1142 0.1181
Notes:
1. Daisy Chain Evaluation Unit information is at Numonyx™ Flash Memory Packaging Technology
http://developer.Numonyx.com/design/flash/packtech.
Max
0.0472
0.0512
-
-
-
0.0209
0.3976
0.5157
-
-
0.0039
0.0630
0.1220
Notes
Datasheet
12
November 2007
Order Number: 306666-11

12 Page





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