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PDF RT8101A Data sheet ( Hoja de datos )
| Número de pieza | RT8101A | |
| Descripción | 12V Synchronous Buck PWM DC-DC | |
| Fabricantes | Richtek Technology Corporation | |
| Logotipo |  |
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Preliminary
RT8101/A
12V Synchronous Buck PWM DC-DC
General Description
The RT8101/A are DC/DC synchronous buck PWM
controllers with embedded driver support up to 12V+12V
boot-strapped voltage for high efficiency power driving. The
parts are with full functions of voltage regulation, power
monitoring and protection into a single small footprint
www.DataShpeaect4kUa.gceoms SOP-8 and SOP-8 (Exposed Pad).
The RT8101/Aapply a high-gain voltage mode PWM control
for simple application design. An internal 0.8V reference
allows the output voltage to be precisely regulated to low
voltage requirement. The parts are proposed with two type
including RT8101 and RT8101A with fixed operating
frequency of 300kHz and 600kHz respectively. Based on
the features that RT8101/A offered, the parts provide an
optimum solution between efficiency, total B.O.M. count,
and cost.
Ordering Information
RT8101/A
Package Type
S : SOP-8
SP : SOP-8 (Exposed Pad)
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
600kHz
300kHz
Note :
RichTek Pb-free and Green products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
`Suitable for use in SnPb or Pb-free soldering processes.
`100% matte tin (Sn) plating.
Features
z Single 12V Bias Supply
z Drives All Low Cost N-MOSFETs
z High-Gain Voltage Model PWM Control
z 300kHz/600kHz Fixed Frequency Oscillator
z Fast Transient Response :
`High-Speed GM Amplifier
`Full 0 to 100% Duty Ratio
`External Compensation in the Control Loop
z Internal Soft-Start
z Adaptive Non-Overlapping Gate Driver
z Over-Current Fault Monitor on MOSFET, No
Current Sense Resistor Required
z RoHS Compliant and 100% Lead (Pb)-Free
Applications
z Graphic Card
z Motherboard, Desktop Servers
z IA Equipments
z Telecomm Equipments
z High Power DC-DC Regulators
Pin Configurations
(TOP VIEW)
BOOT
UGATE
GND
LGATE
2
3
4
8 PHASE
7 COMP
6 FB
5 VCC
SOP-8
BOOT
UGATE
GND
LGATE
8
27
GND
36
45
PHASE
COMP
FB
VCC
SOP-8(Exposed Pad)
DS8101/A-01 March 2007
www.richtek.com
1
1 page  
Preliminary
RT8101/A
Par amete r
Symbol
Test Conditions
Ramp Amplitude
Reference Voltage
PWM Error Amplifier Reference
Error Amplifier
Open Loop DC Gain
Gain-Bandwidth Product
Slew Rate
ΔVOSC VCC = 12V
VREF
AO
GBW
SR
PWM Controller Gate Drivers (VCC = 12V)
www.DataSheet4U.com
Upper Gate Source
IUGATE
Upper Gate Source
RUGATE
Upper Gate Sink
Lower Gate Source
Lower Gate Source
Lower Gate Sink
Protection
RUGATE
ILGATE
RLGATE
RLGATE
VBOOT − VP HASE = 12V,
VBOOT − VUGATE = 6V
VBOOT − VP HASE = 12V,
VBOOT − VUGATE = 1V
VBOOT − VPHASE = 12V,
VUGATE − VPHASE = 1V
VCC = 12V, VLGATE = 6V
VCC − VLGATE = 1V
VLGATE = 1V
Min Typ Max Units
-- 1.5 -- VP-P
0.792 0.8 0.808 V
-- 88 -- dB
-- 15 -- MHz
-- 6 -- V/us
-- 300 -- mA
-- 7 10 Ω
-- 4 8 Ω
-- 500 -- mA
-- 4 6 Ω
-- 2 4 Ω
Under Voltage Protection
Over Current Threshold
Soft-Start Interval
VOC
TSS
Measuring VFB
Measuring VPHASE
0.3 0.4 0.5
−210 −250 −290
2 3.2 4.2
V
mV
ms
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective 4-layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard.
DS8101/A-01 March 2007
www.richtek.com
5
5 Page 
Preliminary
RT8101/A
Figure 7 shows the DC-DC converter's gain vs. frequency.
The compensation gain uses external impedance networks
ZC and ZF to provide a stable, high bandwidth loop. High
crossover frequency is desirable for fast transient
response, but it often jeopardizes the system stability. In
order to cancel one of the LC filter poles, place the zero
before the LC filter resonant frequency. In the experience,
place the zero at 75% LC filter resonant frequency.
Crossover frequency should be higher than the ESR zero
www.DataShbeuett4leUs.csotmhan 1/5 of the switching frequency. The second
pole is placed at half of the switching frequency.
80 80
Loop Gain
60
40 40
20
Compensation
Gain
00
Modulator
-20 Gain
-40-40
-60-60
110H0zvdb(vo) vdb(comp2)11000vHd0zb(lo)
11.0kKHz 110K0Hzk
FrequFreequnenccyy (Hz)
11000K0Hzk
Figure 7. Bode Plot
1.01MHzM
Component Selection
1) Inductor Selection
The selection of output inductor is based on the
considerations of efficiency, output power and operating
frequency. Low inductance value has smaller size, but
results in low efficiency, large ripple current and high output
ripple voltage. Generally, an inductor that limits the ripple
current (ΔIL) between 20% and 50% of the output current
is appropriate. Figure 8 shows the typical topology of
synchronous step-down converter and its related
waveforms.
iS1
S1
VIN S2
L IL
+ VL -
iS2 +
VOR
-
+
VOC
-
iC
rC
RL
COUT
IOUT
+
VOUT
-
TS
Vg1 TON TOFF
Vg2
VL
IL
ΔIL
IS1
VIN - VOUT
- VOUT
IL = IOUT
IS2
Figure 8. The waveforms of synchronous step-down
converter
According to Figure 8 the ripple current of inductor can be
calculated as follows :
VIN
−
VOUT
=
L
ΔIL
Δt
;
Δt
=
D
fs
;
D = VOUT
VIN
L
=
(VIN
−
VOUT
)
×
VOUT
VIN × fs ×
ΔIL
(1)
Where :
VIN = Maximum input voltage
VOUT = Output Voltage
Δt = S1 turn on time
ΔIL = Inductor current ripple
fS = Switching frequency
D = Duty Cycle
rC = Equivalent series resistor of output capacitor
DS8101/A-01 March 2007
www.richtek.com
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet RT8101A.PDF ] | |
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