Datenblatt-pdf.com


GL640USB Schematic ( PDF Datasheet ) - Genesys

Teilenummer GL640USB
Beschreibung IEEE-1284 to USB Bridge
Hersteller Genesys
Logo Genesys Logo 




Gesamt 30 Seiten
GL640USB Datasheet, Funktion
Your Imagination, Our Creation
www.DataSheet4U.com
GL640USB
GL640USB-A
IEEE-1284 to USB Bridge
SPECIFICATION 1.1
June 7, 1999
Genesys Logic, Inc.
10F, No.11, Ln.3, Tsao Ti Wei, Shenkeng, Taipei, Taiwan
Tel: +886-2-2664-6655 Fax: +886-2-2664-5757
http://www.genesyslogic.com






GL640USB Datasheet, Funktion
GL640USB, GL640USB-A
5. Pin Descriptions
GL640USB GL640USB-A SYMBOL I/O
DESCRIPTION
Pin No.
Pin No.
www.DataSheet4U.com
1
43 CLKOUT O Clock output to external device
The clock frequency is selected by setting DEVCTL register.
2 45 HRST I High active hardware reset, internal pull low
With internal power-on reset circuit, this pin can be left unconnected or
pulled low.
3
47 WR#
O This active low signal indicates the EPP write operation.
4 48 WAIT# I this signal acts as the acknowledge from external EPP device, internal
pull up
5-8 1-4 D0-D3 I/O Address/Data bus bit 0 to bit 3
9
5
DVCC
- Digital 5V input
10 6 DGND - Digital ground
11-14
7-10 D4-D7 I/O Address/Data bus bit 4 to bit 7
15
11 VCP
- 3.3 V output. This output voltage is used to pull up D+ line to indicate
the full-speed device.
16
12 D+
I/O USB differential data
17
13 D-
I/O USB differential data
18
14
AVCC
- Analog 5V input
19
16
AGND
- Analog ground
20
17 GPI1
I General purpose input 1
21
20 GPI2
I General purpose input 2
22
21 GPI3
I General purpose input 3
23
22 X2
I/O Crystal output
24
24 X1
I 12/48 MHz crystal or external clock input
25 25 OSCSEL I Oscillator Select, internal pull down
0=12MHz 1=48MHz
26
26 GPI4
I General purpose input 4, internal pull up
Revision 1.1
-5- Jun. 7, 1999

6 Page









GL640USB pdf, datenblatt
GL640USB, GL640USB-A
Purpose
Registers
(64 bytes)
5Fh
Figure 7-2 Data Memory Space
www.DataSheet4U.com 7.2 MCU FUNCTION REGISTERS
Address
00h
01h
02h
03h
04h
06h
07h
0Ah
80h
81h
82h
83h
84h
86h
87h
8Ah
Name
Function
INDR
Addressing this location will use the content of INDAR to
address data memory (not a physical address)
TIMER
Timer register
PCL Program Counter’s low byte
STATUS
Status register
INDAR
Indirect address register
PORT1
Port 1 data register
PORT2
Port 2 data register
PCHBUF Write buffer of Program Counter’s bit 10-8
INDR
Addressing this location will use the content of INDAR to
address data memory (not a physical address)
PSCON
Prescaler control register
PCL Program Counter’s low byte
STATUS
Status register
INDAR
Indirect address register
PORT1CON Port 1 direction control register
PORT2CON Port 2 direction control register
PCHBUF
Write buffer of Program Counter’s bit 10-8
Table 7-1 MCU Function Register Summary
INDR (Address 00h/80h)
INDR is not a physical register. Addressing INDR register will cause indirect addressing. Any
Revision 1.1
-11- Jun. 7, 1999

12 Page





SeitenGesamt 30 Seiten
PDF Download[ GL640USB Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
GL640USBIEEE-1284 to USB BridgeGenesys
Genesys
GL640USB-AIEEE-1284 to USB BridgeGenesys
Genesys

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche