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Teilenummer | ADC08B200 |
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Beschreibung | 200 MSPS A/D Converter | |
Hersteller | National Semiconductor | |
Logo | ||
Gesamt 30 Seiten June 2008
ADC08B200
8-Bit, 200 MSPS A/D Converter with Capture Buffer
General Description
The ADC08B200 is a high speed analog-to-digital converter
(ADC) with an integrated capture buffer. The 8-bit, 200 MSPS
A/D core is based upon the proven ADC08200 with integrated
track-and-hold and is optimized for low power consumption.
This device contains a selectable size capture buffer of up to
1,024 bytes that allows fast capture of an input signal with a
slower readout rate. An on-chip clock PLL circuit provides the
www.DataSheeot4pUtio.cnomof on-chip clock rate multiplication to provide the high
speed sampling clock.
The ADC08B200 is resistant to latch-up and the outputs are
short-circuit proof. The top and bottom of the ADC08B200's
reference ladder are available for connections, enabling a
wide range of input possibilities. The digital outputs are TTL/
CMOS compatible with a separate output power supply pin to
support interfacing with 2.7V to 3.3V logic. The digital inputs
and outputs are low voltage TTL/CMOS compatible and the
output data format is straight binary.
The ADC08B200 is offered in a 48-pin plastic package
(TQFP) and is specified over the extended industrial temper-
ature range of −40°C to +105°C. An evaluation board is
available to assist in the easy evaluation of the ADC08B200.
Features
■ Single-ended input
■ Selectable capture buffer size
■ PLL for clock multiplication
■ Reference Ladder Top and Bottom accessible
■ Linear power scaling with sample rate
■ FPGA training pattern
■ Power-down feature
Key Specifications
(PLL Bypassed)
■ Resolution
■ Maximum sampling frequency
■ DNL
■ ENOB (fIN= 49 MHz)
■ THD (fIN= 49 MHz)
■ Power Consumption
— Operating, 50 MHz Input
— Power Down
8 Bits
200 MSPS (min)
±0.4 LSB (typ)
7.2 bits (typ)
−53 dBc (typ)
2 mW / Msps (typ)
2.15 mW (typ)
Applications
■ Laser Ranging
■ RADAR
■ Pulse Capturings
Pin Configuration
© 2007 National Semiconductor Corporation 202147
20214701
www.national.com
Symbol
Parameter
DIGITAL INPUT CHARACTERISTICS
VIH Logic High Input Voltage
VIL Logic Low Input Voltage
IIH Logic High Input Current
IIL Logic Low Input Current
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CIN Logic Input Capacitance
DIGITAL OUTPUT CHARACTERISTICS
VOH High Level Output Voltage
VOL Low Level Output Voltage
COUT
Digital Output Capacitance
DYNAMIC PERFORMANCE
ENOB Effective Number of Bits
SINAD Signal-to-Noise & Distortion
SNR
Signal-to-Noise Ratio
SFDR Spurious Free Dynamic Range
THD
Total Harmonic Distortion
Conditions
Typical Limits
(Note 9) (Note 9)
OEDGE/TEN
Others
OEDGE/TEN
Others
VIH = VDR = VA = 3.6V
OEDGE/TEN
Operational
Test Mode
Others
OEDGE/TEN
Operational
VIL = 0V, VDR = VA = 3.0V Test Mode
Others
2.2
1.6
0.9
1.3
10
70
10
−10
−600
−50
3
2.7
2.1
0.5
0.7
VA = VDR = 3.0V, IOH = −5 mA
VA = VDR = 3.0V, IOL = 5 mA
3.0 2.4
0.25 0.5
2
fIN = 10 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB, PLL x8
fIN = 100 MHz, VIN = FS − 0.25 dB
fIN = 100 MHz, VIN = FS − 0.25 dB, PLL x4
fIN = 10 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB, PLL x8
fIN = 100 MHz, VIN = FS − 0.25 dB
fIN = 100 MHz, VIN = FS − 0.25 dB, PLL x4
fIN = 10 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB, PLL x8
fIN = 100 MHz, VIN = FS − 0.25 dB
fIN = 100 MHz, VIN = FS − 0.25 dB, PLL x4
fIN = 10 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB, PLL x8
fIN = 100 MHz, VIN = FS − 0.25 dB
fIN = 100 MHz, VIN = FS − 0.25 dB, PLL x4
fIN = 10 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB
fIN = 49 MHz, VIN = FS − 0.25 dB, PLL x8
fIN = 100 MHz, VIN = FS − 0.25 dB
fIN = 100 MHz, VIN = FS − 0.25 dB, PLL x4
7.4
7.2
7.2
7.0
6.9
46
45
45
44
43.4
47
46.3
45.8
45.6
45.6
56
56
56
50
49.7
−55
−53
−53
−49
-47.5
6.8
42.7
43.7
Units
(Limits)
V (min)
V (min)
V (max)
V (max)
µA
µA
nA
µA
µA
nA
pF
V (min)
V (max)
pF
Bits
Bits (min)
Bits
Bits
Bits
dBc
dBc (min)
dBc
dBc
dBc
dBc
dBc (min)
dBc
dBc
\dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
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6
6 Page www.DataSheet4U.com
ADC08B200 Buffer Read Timing (OEDGE/TEN = 1)
20214755
ADC08B200 Buffer Read Timing (OEDGE/TEN = 0)
20214758
ADC08B200 Buffer Bypassed Timing
20214756
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12
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ ADC08B200 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
ADC08B200 | 200 MSPS A/D Converter | National Semiconductor |
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ADC08B200-Q1 | ADC08B200 / ADC08B200Q 8-Bit 200 MSPS A/D Converter with Capture Buffer (Rev. F) | Texas Instruments |
ADC08B200Q | 8-Bit 200 MSPS A/D Converter with Capture Buffer (Rev. F) | Texas Instruments |
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