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PDF CS5550 Data sheet ( Hoja de datos )
| Número de pieza | CS5550 | |
| Descripción | Low-cost A/D Converter | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS5550
Two-channel, Low-cost A/D Converter
Features
z Power Consumption <12 mW
- with VD+ = 3.3 V
z Adjustable Input Range on AIN1±
z GND-referenced Signals with Single Supply
z On-chip 2.5 V Reference (25 ppm/°C typ)
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z Simple Three-wire Digital Serial Interface
z Power Supply Configurations
VA+ = +5 V; AGND = 0 V; VD+ = +3.3 V to +5 V
Description
The CS5550 combines two ∆Σ ADCs and a serial
interface on a single chip. The CS5550 has
on-chip functionality to facilitate offset and gain
calibration. The CS5550 features a bi-directional
serial interface for communication with a
microcontroller.
ORDERING INFORMATION:
CS5550-IS -40°C to +85°C
CS5550-ISZ -40°C to +85°C, Lead-free
24-pin SSOP
24-pin SSOP
VA+
RESET
VD+
AIN1+
AIN1-
+
10x,50x
-
4th Order ∆Σ
Modulator
AIN2+
AIN2-
+
10x
-
2nd Order ∆Σ
Modulator
Digital
Filter
Digital
Filter
Calibration
Registers
Config
Register
Output
Registers
Serial
Interface
CS
SDI
SDO
SCLK
INT
VREFIN
x1
VREFOUT
Voltage
Reference
AGND
Clock
Generator
XIN XOUT CPUCLK
DGND
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
MAR ‘05
DS630F1
1 page  
CS5550
2. CHARACTERISTICS/SPECIFICATIONS
• Min / Max characteristics and specifications are guaranteed over all Operating Conditions.
• Typical characteristics and specifications are measured at nominal supply voltages and TA = 25°C.
• DGND = 0 V. All voltages with respect to 0 V.
ANALOG CHARACTERISTICS
Parameter
Accuracy (Both Channels)
Common Mode Rejection
Offset Drift
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Analog
Inputs
(AIN1±)
Differential Input Voltage Range
{(AIN1+) - (AIN1-)}
Total Harmonic Distortion
Common Mode + Signal
Crosstalk with AIN2± at Full Scale
Input Capacitance
Effective Input Impedance
(Note 2)
Noise (Referred to Input)
Accuracy
Bipolar Offset Error
Full-Scale Error
Analog Inputs (AIN2±)
Differential Input Voltage Range
Total Harmonic Distortion
Common Mode + Signal
Crosstalk with AIN1± at Full Scale
Input Capacitance
Effective Input Impedance (Note 2)
Noise (Referred to Input)
Accuracy
Bipolar Offset Error
Full-Scale Error
Symbol Min
(DC, 50, 60 Hz) CMRR
80
-
(Gain = 10)
(Gain = 50)
Both Gain Ranges
(50, 60 Hz)
(Gain = 10)
(Gain = 50)
(Gain = 10)
(Gain = 50)
(Gain = 10)
(Gain = 50)
AIN1
THD1
IC1
EII1
N1
0
0
80
-0.25
-
-
-
30
30
-
-
(Note 1)
(Note 1)
VOS
FSE
-
-
{(AIN2+) - (AIN2-)}
AIN2
THD2
(50, 60 Hz)
(Gain = 10)
(Gain = 10)
(Gain = 10)
IC2
EII2
N2
(Note 1)
(Note 1)
VOS
FSE
0
65
-0.25
-
-
5
-
-
-
Typ Max Unit
- - dB
5 - nV/°C
- 500 mVP-P
- 100 mVP-P
- - dB
- VA+ V
- -115 dB
25 - pF
25 - pF
- - kΩ
- - kΩ
- 22.5 µVrms
- 4.5 µVrms
- ±0.001 %F.S.
- ±0.001 %F.S.
- 500 mVP-P
- - dB
- VA+ V
- -70 dB
0.2 - pF
- - MΩ
-
150
µVrms
- ±0.01 %F.S.
- ±0.01 %F.S.
Notes: 1. Applies after system calibration
2. Effective Input Impedance (EII) is determined by clock frequency (DCLK) and Input Capacitance (IC).
EII = 1/(IC*DCLK/4). Note that DCLK = MCLK / K.
DS630F1
5
5 Page 
CS5550
This linearity is guaranteed for all available
full-scale input voltage ranges.
Note that until the CS5550 is calibrated (see Cali-
bration) the accuracy of the CS5550 is not guaran-
teed to within ±0.1%. But the linearity of any given
sample of CS5550, before calibration, will be within
±0.1% of reading over the ranges specified, with
respect to the input voltage levels required to
cause full-scale readings in the FILT Registers. Ta-
ble 2 describes linearity + variation specs after the
completion of each successive computation cycle.
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3. FUNCTIONAL DESCRIPTION
3.1 Analog Inputs
The CS5550 has two available full-scale differen-
tial input voltage ranges for AIN1±.
The input ranges are the maximum sinusoidal sig-
nals that can be applied to the analog inputs, yet
theses values will not result in full scale registra-
tion.
If the analog inputs are set to 500 mVP-P, only a
250 mVRMS signal will register full scale. Yet it
would not be practical to inject a sinusoidal signal
with a value of 250 mVRMS. When such a sine
wave enters the higher levels of its positive crest
region (over each cycle), the voltage level of this
signal exceeds the maximum differential input volt-
age range of the input channels. The largest sine
wave voltage signal that can be placed across the
inputs, with no saturation is:
500mVP-P = ~176.78mVRMS
22
which is ~70.7% of full-scale. So for sinusoidal in-
puts at the full scale peak-to-peak level the full
scale registration is ~.707.
3.2 Voltage Reference
The CS5550 is specified for operation with a
+2.5 V reference between the VREFIN and AGND
pins. The converter includes an internal 2.5 V ref-
erence (25 ppm/°C drift) that can be used by con-
necting the VREFOUT pin to the VREFIN pin of the
device. If higher accuracy/stability is required, an
external reference can be used.
3.3 Oscillator Characteristics
XIN and XOUT are the input and output of an in-
verting amplifier to provide oscillation and can be
configured as an on-chip oscillator, as shown in
Figure 2. The oscillator circuit is designed to work
with a quartz crystal or a ceramic resonator. To re-
duce circuit cost, two load capacitors C1 and C2
are integrated in the device. With these load ca-
pacitors, the oscillator circuit is capable of oscilla-
tion up to 20 MHz. To drive the device from an
external clock source, XOUT should be left uncon-
nected while XIN is driven by the external circuitry.
There is an amplifier between XIN and the digital
section which provides CMOS level signals. This
amplifier works with sinusoidal inputs so there are
no problems with slow edge times.
The CS5550 can be driven by an external oscillator
ranging from 2.5 to 20 MHz, but the K divider value
must be set such that the internal DCLK will run
somewhere between 2.5 MHz and 5 MHz. The K
divider value is set with the K[3:0] bits in the Con-
figuration Register. As an example, if XIN = MCLK
= 15 MHz, and K is set to 5, then DCLK is 3 MHz,
which is a valid value for DCLK.
XOUT
C1
Oscillator
Circuit
XIN
DGND
C2
C1 = C2 = 22 pF
Figure 2. Oscillator Connection
DS630F1
11
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet CS5550.PDF ] | |
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